utility.cc (9920:028e4da64b42) utility.cc (9921:ee049bfce978)
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * Copyright (c) 2011 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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239copyRegs(ThreadContext *src, ThreadContext *dest)
240{
241 //copy int regs
242 for (int i = 0; i < NumIntRegs; ++i)
243 dest->setIntReg(i, src->readIntReg(i));
244 //copy float regs
245 for (int i = 0; i < NumFloatRegs; ++i)
246 dest->setFloatRegBits(i, src->readFloatRegBits(i));
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * Copyright (c) 2011 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 230 unchanged lines hidden (view full) ---

239copyRegs(ThreadContext *src, ThreadContext *dest)
240{
241 //copy int regs
242 for (int i = 0; i < NumIntRegs; ++i)
243 dest->setIntReg(i, src->readIntReg(i));
244 //copy float regs
245 for (int i = 0; i < NumFloatRegs; ++i)
246 dest->setFloatRegBits(i, src->readFloatRegBits(i));
247 // Will need to add condition-code regs when implemented
248 assert(NumCCRegs == 0);
247 //copy condition-code regs
248 for (int i = 0; i < NumCCRegs; ++i)
249 dest->setCCReg(i, src->readCCReg(i));
249 copyMiscRegs(src, dest);
250 dest->pcState(src->pcState());
251}
252
253void
254skipFunction(ThreadContext *tc)
255{
256 panic("Not implemented for x86\n");
257}
258
259uint64_t
260getRFlags(ThreadContext *tc)
261{
262 const uint64_t ncc_flags(tc->readMiscRegNoEffect(MISCREG_RFLAGS));
250 copyMiscRegs(src, dest);
251 dest->pcState(src->pcState());
252}
253
254void
255skipFunction(ThreadContext *tc)
256{
257 panic("Not implemented for x86\n");
258}
259
260uint64_t
261getRFlags(ThreadContext *tc)
262{
263 const uint64_t ncc_flags(tc->readMiscRegNoEffect(MISCREG_RFLAGS));
263 const uint64_t cc_flags(tc->readIntReg(X86ISA::INTREG_PSEUDO(0)));
264 const uint64_t cfof_bits(tc->readIntReg(X86ISA::INTREG_PSEUDO(1)));
265 const uint64_t df_bit(tc->readIntReg(X86ISA::INTREG_PSEUDO(2)));
264 const uint64_t cc_flags(tc->readIntReg(X86ISA::CCREG_ZAPS));
265 const uint64_t cfof_bits(tc->readIntReg(X86ISA::CCREG_CFOF));
266 const uint64_t df_bit(tc->readIntReg(X86ISA::CCREG_DF));
266 // ecf (PSEUDO(3)) & ezf (PSEUDO(4)) are only visible to
267 // microcode, so we can safely ignore them.
268
269 // Reconstruct the real rflags state, mask out internal flags, and
270 // make sure reserved bits have the expected values.
271 return ((ncc_flags | cc_flags | cfof_bits | df_bit) & 0x3F7FD5)
272 | 0x2;
273}
274
275void
276setRFlags(ThreadContext *tc, uint64_t val)
277{
267 // ecf (PSEUDO(3)) & ezf (PSEUDO(4)) are only visible to
268 // microcode, so we can safely ignore them.
269
270 // Reconstruct the real rflags state, mask out internal flags, and
271 // make sure reserved bits have the expected values.
272 return ((ncc_flags | cc_flags | cfof_bits | df_bit) & 0x3F7FD5)
273 | 0x2;
274}
275
276void
277setRFlags(ThreadContext *tc, uint64_t val)
278{
278 tc->setIntReg(X86ISA::INTREG_PSEUDO(0), val & ccFlagMask);
279 tc->setIntReg(X86ISA::INTREG_PSEUDO(1), val & cfofMask);
280 tc->setIntReg(X86ISA::INTREG_PSEUDO(2), val & DFBit);
279 tc->setIntReg(X86ISA::CCREG_ZAPS, val & ccFlagMask);
280 tc->setIntReg(X86ISA::CCREG_CFOF, val & cfofMask);
281 tc->setIntReg(X86ISA::CCREG_DF, val & DFBit);
281
282 // Internal microcode registers (ECF & EZF)
282
283 // Internal microcode registers (ECF & EZF)
283 tc->setIntReg(X86ISA::INTREG_PSEUDO(3), 0);
284 tc->setIntReg(X86ISA::INTREG_PSEUDO(4), 0);
284 tc->setIntReg(X86ISA::CCREG_ECF, 0);
285 tc->setIntReg(X86ISA::CCREG_EZF, 0);
285
286 // Update the RFLAGS misc reg with whatever didn't go into the
287 // magic registers.
288 tc->setMiscReg(MISCREG_RFLAGS, val & ~(ccFlagMask | cfofMask | DFBit));
289}
290
291uint8_t
292convX87TagsToXTags(uint16_t ftw)

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287 // Update the RFLAGS misc reg with whatever didn't go into the
288 // magic registers.
289 tc->setMiscReg(MISCREG_RFLAGS, val & ~(ccFlagMask | cfofMask | DFBit));
290}
291
292uint8_t
293convX87TagsToXTags(uint16_t ftw)

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