utility.cc (9544:1a075d9bc1bc) utility.cc (9751:e039a48eeb99)
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * Copyright (c) 2011 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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204 if ( ( i != MISCREG_CR1 &&
205 !(i > MISCREG_CR4 && i < MISCREG_CR8) &&
206 !(i > MISCREG_CR8 && i <= MISCREG_CR15) ) == false) {
207 continue;
208 }
209 dest->setMiscRegNoEffect(i, src->readMiscRegNoEffect(i));
210 }
211
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * Copyright (c) 2011 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 195 unchanged lines hidden (view full) ---

204 if ( ( i != MISCREG_CR1 &&
205 !(i > MISCREG_CR4 && i < MISCREG_CR8) &&
206 !(i > MISCREG_CR8 && i <= MISCREG_CR15) ) == false) {
207 continue;
208 }
209 dest->setMiscRegNoEffect(i, src->readMiscRegNoEffect(i));
210 }
211
212 // The TSC has to be updated with side-effects if the CPUs in a
213 // CPU switch have different frequencies.
214 dest->setMiscReg(MISCREG_TSC, src->readMiscReg(MISCREG_TSC));
215
212 dest->getITBPtr()->flushAll();
213 dest->getDTBPtr()->flushAll();
214}
215
216void
217copyRegs(ThreadContext *src, ThreadContext *dest)
218{
219 //copy int regs

--- 17 unchanged lines hidden --- 		216 dest->getITBPtr()->flushAll();
217 dest->getDTBPtr()->flushAll();
218}
219
220void
221copyRegs(ThreadContext *src, ThreadContext *dest)
222{
223 //copy int regs

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