utility.cc (8768:314eb1e2fa94) utility.cc (9157:e0bad9d7bbd6)
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * Copyright (c) 2011 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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168
169 Interrupts * interrupts = dynamic_cast<Interrupts *>(
170 tc->getCpuPtr()->getInterruptController());
171 assert(interrupts);
172
173 interrupts->setRegNoEffect(APIC_ID, cpuId << 24);
174
175 interrupts->setRegNoEffect(APIC_VERSION, (5 << 16) | 0x14);
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * Copyright (c) 2011 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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168
169 Interrupts * interrupts = dynamic_cast<Interrupts *>(
170 tc->getCpuPtr()->getInterruptController());
171 assert(interrupts);
172
173 interrupts->setRegNoEffect(APIC_ID, cpuId << 24);
174
175 interrupts->setRegNoEffect(APIC_VERSION, (5 << 16) | 0x14);
176
176
177 // @todo: Control the relative frequency, in this case 16:1, of
178 // the clocks in the Python code
177 interrupts->setClock(tc->getCpuPtr()->ticks(16));
178
179 // TODO Set the SMRAM base address (SMBASE) to 0x00030000
180
181 tc->setMiscReg(MISCREG_VM_CR, 0);
182 tc->setMiscReg(MISCREG_IGNNE, 0);
183 tc->setMiscReg(MISCREG_SMM_CTL, 0);
184 tc->setMiscReg(MISCREG_VM_HSAVE_PA, 0);

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179 interrupts->setClock(tc->getCpuPtr()->ticks(16));
180
181 // TODO Set the SMRAM base address (SMBASE) to 0x00030000
182
183 tc->setMiscReg(MISCREG_VM_CR, 0);
184 tc->setMiscReg(MISCREG_IGNNE, 0);
185 tc->setMiscReg(MISCREG_SMM_CTL, 0);
186 tc->setMiscReg(MISCREG_VM_HSAVE_PA, 0);

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