utility.cc (7707:e5b6f1157be3) | utility.cc (7720:65d338a8dba4) |
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1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 58 unchanged lines hidden (view full) --- 67void initCPU(ThreadContext *tc, int cpuId) 68{ 69 // This function is essentially performing a reset. The actual INIT 70 // interrupt does a subset of this, so we'll piggyback on some of its 71 // functionality. 72 InitInterrupt init(0); 73 init.invoke(tc); 74 | 1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 58 unchanged lines hidden (view full) --- 67void initCPU(ThreadContext *tc, int cpuId) 68{ 69 // This function is essentially performing a reset. The actual INIT 70 // interrupt does a subset of this, so we'll piggyback on some of its 71 // functionality. 72 InitInterrupt init(0); 73 init.invoke(tc); 74 |
75 tc->setMicroPC(0); 76 tc->setNextMicroPC(1); | 75 PCState pc = tc->pcState(); 76 pc.upc(0); 77 pc.nupc(1); 78 tc->pcState(pc); |
77 78 // These next two loops zero internal microcode and implicit registers. 79 // They aren't specified by the ISA but are used internally by M5's 80 // implementation. 81 for (int index = 0; index < NumMicroIntRegs; index++) { 82 tc->setIntReg(INTREG_MICRO(index), 0); 83 } 84 --- 141 unchanged lines hidden (view full) --- 226void 227copyRegs(ThreadContext *src, ThreadContext *dest) 228{ 229 panic("copyRegs not implemented for x86!\n"); 230 //copy int regs 231 //copy float regs 232 copyMiscRegs(src, dest); 233 | 79 80 // These next two loops zero internal microcode and implicit registers. 81 // They aren't specified by the ISA but are used internally by M5's 82 // implementation. 83 for (int index = 0; index < NumMicroIntRegs; index++) { 84 tc->setIntReg(INTREG_MICRO(index), 0); 85 } 86 --- 141 unchanged lines hidden (view full) --- 228void 229copyRegs(ThreadContext *src, ThreadContext *dest) 230{ 231 panic("copyRegs not implemented for x86!\n"); 232 //copy int regs 233 //copy float regs 234 copyMiscRegs(src, dest); 235 |
234 dest->setPC(src->readPC()); 235 dest->setNextPC(src->readNextPC()); | 236 dest->pcState(src->pcState()); |
236} 237 238void 239skipFunction(ThreadContext *tc) 240{ 241 panic("Not implemented for x86\n"); 242} 243 244 245} //namespace X86_ISA | 237} 238 239void 240skipFunction(ThreadContext *tc) 241{ 242 panic("Not implemented for x86\n"); 243} 244 245 246} //namespace X86_ISA |