247,248c247,249
< // Will need to add condition-code regs when implemented
< assert(NumCCRegs == 0);
---
> //copy condition-code regs
> for (int i = 0; i < NumCCRegs; ++i)
> dest->setCCReg(i, src->readCCReg(i));
263,265c264,266
< const uint64_t cc_flags(tc->readIntReg(X86ISA::INTREG_PSEUDO(0)));
< const uint64_t cfof_bits(tc->readIntReg(X86ISA::INTREG_PSEUDO(1)));
< const uint64_t df_bit(tc->readIntReg(X86ISA::INTREG_PSEUDO(2)));
---
> const uint64_t cc_flags(tc->readIntReg(X86ISA::CCREG_ZAPS));
> const uint64_t cfof_bits(tc->readIntReg(X86ISA::CCREG_CFOF));
> const uint64_t df_bit(tc->readIntReg(X86ISA::CCREG_DF));
278,280c279,281
< tc->setIntReg(X86ISA::INTREG_PSEUDO(0), val & ccFlagMask);
< tc->setIntReg(X86ISA::INTREG_PSEUDO(1), val & cfofMask);
< tc->setIntReg(X86ISA::INTREG_PSEUDO(2), val & DFBit);
---
> tc->setIntReg(X86ISA::CCREG_ZAPS, val & ccFlagMask);
> tc->setIntReg(X86ISA::CCREG_CFOF, val & cfofMask);
> tc->setIntReg(X86ISA::CCREG_DF, val & DFBit);
283,284c284,285
< tc->setIntReg(X86ISA::INTREG_PSEUDO(3), 0);
< tc->setIntReg(X86ISA::INTREG_PSEUDO(4), 0);
---
> tc->setIntReg(X86ISA::CCREG_ECF, 0);
> tc->setIntReg(X86ISA::CCREG_EZF, 0);