1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * Copyright (c) 2011 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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33 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 *
38 * Authors: Gabe Black
39 */
40
41#include "arch/x86/interrupts.hh"
42#include "arch/x86/registers.hh"
43#include "arch/x86/tlb.hh"
44#include "arch/x86/utility.hh"
45#include "arch/x86/x86_traits.hh"
46#include "cpu/base.hh"
47#include "sim/system.hh"
48
49namespace X86ISA {
50
51uint64_t
52getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
53{
54 panic("getArgument() not implemented for x86!\n");
55 M5_DUMMY_RETURN
56}
57
58void initCPU(ThreadContext *tc, int cpuId)
59{
60 // This function is essentially performing a reset. The actual INIT
61 // interrupt does a subset of this, so we'll piggyback on some of its
62 // functionality.
63 InitInterrupt init(0);
64 init.invoke(tc);
65

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179 // TODO Set the SMRAM base address (SMBASE) to 0x00030000
180
181 tc->setMiscReg(MISCREG_VM_CR, 0);
182 tc->setMiscReg(MISCREG_IGNNE, 0);
183 tc->setMiscReg(MISCREG_SMM_CTL, 0);
184 tc->setMiscReg(MISCREG_VM_HSAVE_PA, 0);
185}
186
187void startupCPU(ThreadContext *tc, int cpuId)
188{
189 if (cpuId == 0 || !FullSystem) {
190 tc->activate(0);
191 } else {
192 // This is an application processor (AP). It should be initialized to
193 // look like only the BIOS POST has run on it and put then put it into
194 // a halted state.
195 tc->suspend(0);
196 }
197}
198
199void
200copyMiscRegs(ThreadContext *src, ThreadContext *dest)
201{
202 // This function assumes no side effects other than TLB invalidation
203 // need to be considered while copying state. That will likely not be
204 // true in the future.

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