tlb.hh (8922:17f037ad8918) tlb.hh (8953:488d45aeb672)
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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41#define __ARCH_X86_TLB_HH__
42
43#include <list>
44#include <string>
45#include <vector>
46
47#include "arch/x86/regs/segment.hh"
48#include "arch/x86/pagetable.hh"
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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41#define __ARCH_X86_TLB_HH__
42
43#include <list>
44#include <string>
45#include <vector>
46
47#include "arch/x86/regs/segment.hh"
48#include "arch/x86/pagetable.hh"
49#include "base/trie.hh"
49#include "mem/mem_object.hh"
50#include "mem/request.hh"
51#include "params/X86TLB.hh"
52#include "sim/fault_fwd.hh"
53#include "sim/sim_object.hh"
54#include "sim/tlb.hh"
55
56class ThreadContext;

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98 protected:
99 int size;
100
101 TlbEntry * tlb;
102
103 EntryList freeList;
104 EntryList entryList;
105
50#include "mem/mem_object.hh"
51#include "mem/request.hh"
52#include "params/X86TLB.hh"
53#include "sim/fault_fwd.hh"
54#include "sim/sim_object.hh"
55#include "sim/tlb.hh"
56
57class ThreadContext;

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99 protected:
100 int size;
101
102 TlbEntry * tlb;
103
104 EntryList freeList;
105 EntryList entryList;
106
107 TlbEntryTrie trie;
108 uint64_t lruSeq;
109
106 Fault translateInt(RequestPtr req, ThreadContext *tc);
107
108 Fault translate(RequestPtr req, ThreadContext *tc,
109 Translation *translation, Mode mode,
110 bool &delayedResponse, bool timing);
111
112 public:
113
110 Fault translateInt(RequestPtr req, ThreadContext *tc);
111
112 Fault translate(RequestPtr req, ThreadContext *tc,
113 Translation *translation, Mode mode,
114 bool &delayedResponse, bool timing);
115
116 public:
117
118 void evictLRU();
119
120 uint64_t
121 nextSeq()
122 {
123 return ++lruSeq;
124 }
125
114 Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode);
115 void translateTiming(RequestPtr req, ThreadContext *tc,
116 Translation *translation, Mode mode);
117 /** Stub function for compilation support of CheckerCPU. x86 ISA does
118 * not support Checker model at the moment
119 */
120 Fault translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode);
121

--- 21 unchanged lines hidden --- 		126 Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode);
127 void translateTiming(RequestPtr req, ThreadContext *tc,
128 Translation *translation, Mode mode);
129 /** Stub function for compilation support of CheckerCPU. x86 ISA does
130 * not support Checker model at the moment
131 */
132 Fault translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode);
133

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