tlb.hh (5895:569e3b31a868) | tlb.hh (6022:410194bb3049) |
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1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * All rights reserved. 4 * 5 * Redistribution and use of this software in source and binary forms, 6 * with or without modification, are permitted provided that the 7 * following conditions are met: 8 * --- 53 unchanged lines hidden (view full) --- 62#include <vector> 63#include <string> 64 65#include "arch/x86/pagetable.hh" 66#include "arch/x86/segmentregs.hh" 67#include "config/full_system.hh" 68#include "mem/mem_object.hh" 69#include "mem/request.hh" | 1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * All rights reserved. 4 * 5 * Redistribution and use of this software in source and binary forms, 6 * with or without modification, are permitted provided that the 7 * following conditions are met: 8 * --- 53 unchanged lines hidden (view full) --- 62#include <vector> 63#include <string> 64 65#include "arch/x86/pagetable.hh" 66#include "arch/x86/segmentregs.hh" 67#include "config/full_system.hh" 68#include "mem/mem_object.hh" 69#include "mem/request.hh" |
70#include "params/X86DTB.hh" 71#include "params/X86ITB.hh" | 70#include "params/X86TLB.hh" |
72#include "sim/faults.hh" 73#include "sim/tlb.hh" 74#include "sim/sim_object.hh" 75 76class ThreadContext; 77class Packet; 78 79namespace X86ISA 80{ 81 class Walker; 82 83 static const unsigned StoreCheck = 1 << NUM_SEGMENTREGS; 84 | 71#include "sim/faults.hh" 72#include "sim/tlb.hh" 73#include "sim/sim_object.hh" 74 75class ThreadContext; 76class Packet; 77 78namespace X86ISA 79{ 80 class Walker; 81 82 static const unsigned StoreCheck = 1 << NUM_SEGMENTREGS; 83 |
85 class TLB; 86 | |
87 class TLB : public BaseTLB 88 { 89 protected: 90 friend class Walker; 91 92 typedef std::list<TlbEntry *> EntryList; 93 | 84 class TLB : public BaseTLB 85 { 86 protected: 87 friend class Walker; 88 89 typedef std::list<TlbEntry *> EntryList; 90 |
94 bool _allowNX; | |
95 uint32_t configAddress; 96 97 public: | 91 uint32_t configAddress; 92 93 public: |
98 bool allowNX() const 99 { 100 return _allowNX; 101 } | |
102 103 typedef X86TLBParams Params; 104 TLB(const Params *p); 105 106 void dumpAll(); 107 108 TlbEntry *lookup(Addr va, bool update_lru = true); 109 --- 25 unchanged lines hidden (view full) --- 135 EntryList entryList; 136 137 Fault translate(RequestPtr req, ThreadContext *tc, 138 Translation *translation, bool write, bool execute, 139 bool &delayedResponse, bool timing); 140 141 public: 142 | 94 95 typedef X86TLBParams Params; 96 TLB(const Params *p); 97 98 void dumpAll(); 99 100 TlbEntry *lookup(Addr va, bool update_lru = true); 101 --- 25 unchanged lines hidden (view full) --- 127 EntryList entryList; 128 129 Fault translate(RequestPtr req, ThreadContext *tc, 130 Translation *translation, bool write, bool execute, 131 bool &delayedResponse, bool timing); 132 133 public: 134 |
143 TlbEntry * insert(Addr vpn, TlbEntry &entry); 144 145 // Checkpointing 146 virtual void serialize(std::ostream &os); 147 virtual void unserialize(Checkpoint *cp, const std::string §ion); 148 }; 149 150 class ITB : public TLB 151 { 152 public: 153 typedef X86ITBParams Params; 154 ITB(const Params *p) : TLB(p) 155 { 156 _allowNX = false; 157 } 158 159 Fault translateAtomic(RequestPtr req, ThreadContext *tc); | 135 Fault translateAtomic(RequestPtr req, ThreadContext *tc, 136 bool write = false, bool execute = false); |
160 void translateTiming(RequestPtr req, ThreadContext *tc, | 137 void translateTiming(RequestPtr req, ThreadContext *tc, |
161 Translation *translation); | 138 Translation *translation, 139 bool write = false, bool execute = false); |
162 | 140 |
163 friend class DTB; 164 }; 165 166 class DTB : public TLB 167 { 168 public: 169 typedef X86DTBParams Params; 170 DTB(const Params *p) : TLB(p) 171 { 172 _allowNX = true; 173 } 174 Fault translateAtomic(RequestPtr req, ThreadContext *tc, bool write); 175 void translateTiming(RequestPtr req, ThreadContext *tc, 176 Translation *translation, bool write); | |
177#if FULL_SYSTEM 178 Tick doMmuRegRead(ThreadContext *tc, Packet *pkt); 179 Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt); 180#endif 181 | 141#if FULL_SYSTEM 142 Tick doMmuRegRead(ThreadContext *tc, Packet *pkt); 143 Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt); 144#endif 145 |
146 TlbEntry * insert(Addr vpn, TlbEntry &entry); 147 |
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182 // Checkpointing 183 virtual void serialize(std::ostream &os); 184 virtual void unserialize(Checkpoint *cp, const std::string §ion); 185 }; 186} 187 188#endif // __ARCH_X86_TLB_HH__ | 148 // Checkpointing 149 virtual void serialize(std::ostream &os); 150 virtual void unserialize(Checkpoint *cp, const std::string §ion); 151 }; 152} 153 154#endif // __ARCH_X86_TLB_HH__ |