1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 108 unchanged lines hidden (view full) ---

117 void evictLRU();
118
119 uint64_t
120 nextSeq()
121 {
122 return ++lruSeq;
123 }
124
125 Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode);
126 void translateTiming(RequestPtr req, ThreadContext *tc,
127 Translation *translation, Mode mode);
128 /** Stub function for compilation support of CheckerCPU. x86 ISA does
129 * not support Checker model at the moment
130 */
131 Fault translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode);
132
133 /**
134 * Do post-translation physical address finalization.
135 *
136 * Some addresses, for example requests going to the APIC,
137 * need post-translation updates. Such physical addresses are
138 * remapped into a "magic" part of the physical address space
139 * by this method.
140 *
141 * @param req Request to updated in-place.
142 * @param tc Thread context that created the request.
143 * @param mode Request type (read/write/execute).
144 * @return A fault on failure, NoFault otherwise.
145 */
146 Fault finalizePhysical(RequestPtr req, ThreadContext *tc,
147 Mode mode) const;
148
149 TlbEntry * insert(Addr vpn, TlbEntry &entry);
150
151 /*
152 * Function to register Stats
153 */
154 void regStats() override;
155

--- 19 unchanged lines hidden ---