tlb.cc (8098:59a19310ca65) tlb.cc (8105:906864dd0937)
1/*
2 * Copyright (c) 2007-2008 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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174{
175 DPRINTF(TLB, "Addresses references internal memory.\n");
176 Addr vaddr = req->getVaddr();
177 Addr prefix = (vaddr >> 3) & IntAddrPrefixMask;
178 if (prefix == IntAddrPrefixCPUID) {
179 panic("CPUID memory space not yet implemented!\n");
180 } else if (prefix == IntAddrPrefixMSR) {
181 vaddr = vaddr >> 3;
1/*
2 * Copyright (c) 2007-2008 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 165 unchanged lines hidden (view full) ---

174{
175 DPRINTF(TLB, "Addresses references internal memory.\n");
176 Addr vaddr = req->getVaddr();
177 Addr prefix = (vaddr >> 3) & IntAddrPrefixMask;
178 if (prefix == IntAddrPrefixCPUID) {
179 panic("CPUID memory space not yet implemented!\n");
180 } else if (prefix == IntAddrPrefixMSR) {
181 vaddr = vaddr >> 3;
182 req->setFlags(Request::MMAPED_IPR);
182 req->setFlags(Request::MMAPPED_IPR);
183 Addr regNum = 0;
184 switch (vaddr & ~IntAddrPrefixMask) {
185 case 0x10:
186 regNum = MISCREG_TSC;
187 break;
188 case 0x1B:
189 regNum = MISCREG_APIC_BASE;
190 break;

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503 // TODO If CPL > IOPL or in virtual mode, check the I/O permission
504 // bitmap in the TSS.
505
506 Addr IOPort = vaddr & ~IntAddrPrefixMask;
507 // Make sure the address fits in the expected 16 bit IO address
508 // space.
509 assert(!(IOPort & ~0xFFFF));
510 if (IOPort == 0xCF8 && req->getSize() == 4) {
183 Addr regNum = 0;
184 switch (vaddr & ~IntAddrPrefixMask) {
185 case 0x10:
186 regNum = MISCREG_TSC;
187 break;
188 case 0x1B:
189 regNum = MISCREG_APIC_BASE;
190 break;

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503 // TODO If CPL > IOPL or in virtual mode, check the I/O permission
504 // bitmap in the TSS.
505
506 Addr IOPort = vaddr & ~IntAddrPrefixMask;
507 // Make sure the address fits in the expected 16 bit IO address
508 // space.
509 assert(!(IOPort & ~0xFFFF));
510 if (IOPort == 0xCF8 && req->getSize() == 4) {
511 req->setFlags(Request::MMAPED_IPR);
511 req->setFlags(Request::MMAPPED_IPR);
512 req->setPaddr(MISCREG_PCI_CONFIG_ADDRESS * sizeof(MiscReg));
513 } else if ((IOPort & ~mask(2)) == 0xCFC) {
514 req->setFlags(Request::UNCACHEABLE);
515 Addr configAddress =
516 tc->readMiscRegNoEffect(MISCREG_PCI_CONFIG_ADDRESS);
517 if (bits(configAddress, 31, 31)) {
518 req->setPaddr(PhysAddrPrefixPciConfig |
519 mbits(configAddress, 30, 2) |

--- 236 unchanged lines hidden --- 		512 req->setPaddr(MISCREG_PCI_CONFIG_ADDRESS * sizeof(MiscReg));
513 } else if ((IOPort & ~mask(2)) == 0xCFC) {
514 req->setFlags(Request::UNCACHEABLE);
515 Addr configAddress =
516 tc->readMiscRegNoEffect(MISCREG_PCI_CONFIG_ADDRESS);
517 if (bits(configAddress, 31, 31)) {
518 req->setPaddr(PhysAddrPrefixPciConfig |
519 mbits(configAddress, 30, 2) |

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