1/* 2 * Copyright (c) 2007-2008 The Hewlett-Packard Development Company 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 318 unchanged lines hidden (view full) --- 327 if (m5Reg.submode != SixtyFourBitMode || 328 (flags & (AddrSizeFlagBit << FlagShift))) 329 vaddr &= mask(32); 330 // If paging is enabled, do the translation. 331 if (m5Reg.paging) { 332 DPRINTF(TLB, "Paging enabled.\n"); 333 // The vaddr already has the segment base applied. 334 TlbEntry *entry = lookup(vaddr); |
335 if (mode == Read) { 336 rdAccesses++; 337 } else { 338 wrAccesses++; 339 } |
340 if (!entry) { |
341 DPRINTF(TLB, "Handling a TLB miss for " 342 "address %#x at pc %#x.\n", 343 vaddr, tc->instAddr()); 344 if (mode == Read) { 345 rdMisses++; 346 } else { 347 wrMisses++; 348 } |
349 if (FullSystem) { 350 Fault fault = walker->start(tc, translation, req, mode); 351 if (timing || fault != NoFault) { 352 // This gets ignored in atomic mode. 353 delayedResponse = true; 354 return fault; 355 } 356 entry = lookup(vaddr); 357 assert(entry); 358 } else { |
359 Process *p = tc->getProcessPtr(); 360 TlbEntry newEntry; 361 bool success = p->pTable->lookup(vaddr, newEntry); 362 if (!success && mode != Execute) { 363 // Check if we just need to grow the stack. 364 if (p->fixupStackFault(vaddr)) { 365 // If we did, lookup the entry for the new page. 366 success = p->pTable->lookup(vaddr, newEntry); --- 82 unchanged lines hidden (view full) --- 449 450Walker * 451TLB::getWalker() 452{ 453 return walker; 454} 455 456void |
457TLB::regStats() 458{ 459 using namespace Stats; 460 461 rdAccesses 462 .name(name() + ".rdAccesses") 463 .desc("TLB accesses on read requests"); 464 465 wrAccesses 466 .name(name() + ".wrAccesses") 467 .desc("TLB accesses on write requests"); 468 469 rdMisses 470 .name(name() + ".rdMisses") 471 .desc("TLB misses on read requests"); 472 473 wrMisses 474 .name(name() + ".wrMisses") 475 .desc("TLB misses on write requests"); 476 477} 478 479void |
480TLB::serialize(CheckpointOut &cp) const 481{ 482 // Only store the entries in use. 483 uint32_t _size = size - freeList.size(); 484 SERIALIZE_SCALAR(_size); 485 SERIALIZE_SCALAR(lruSeq); 486 487 uint32_t _count = 0; --- 41 unchanged lines hidden --- |