system.cc (12588:c007da6c777a) system.cc (13613:a19963be12ca)
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * Copyright (c) 2018 TU Dresden
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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95 attr.readable = 1;
96 attr.writable = 1;
97 attr.expandDown = 0;
98 }
99
100 tc->setMiscReg(MISCREG_SEG_BASE(seg), desc.base);
101 tc->setMiscReg(MISCREG_SEG_EFF_BASE(seg), honorBase ? desc.base : 0);
102 tc->setMiscReg(MISCREG_SEG_LIMIT(seg), desc.limit);
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * Copyright (c) 2018 TU Dresden
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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95 attr.readable = 1;
96 attr.writable = 1;
97 attr.expandDown = 0;
98 }
99
100 tc->setMiscReg(MISCREG_SEG_BASE(seg), desc.base);
101 tc->setMiscReg(MISCREG_SEG_EFF_BASE(seg), honorBase ? desc.base : 0);
102 tc->setMiscReg(MISCREG_SEG_LIMIT(seg), desc.limit);
103 tc->setMiscReg(MISCREG_SEG_ATTR(seg), (MiscReg)attr);
103 tc->setMiscReg(MISCREG_SEG_ATTR(seg), (RegVal)attr);
104}
105
106void
107X86System::initState()
108{
109 System::initState();
110
111 if (!kernel)

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170 physProxy.writeBlob(GDTBase + numGDTEntries * 8,
171 (uint8_t *)(&csDescVal), 8);
172
173 numGDTEntries++;
174
175 SegSelector cs = 0;
176 cs.si = numGDTEntries - 1;
177
104}
105
106void
107X86System::initState()
108{
109 System::initState();
110
111 if (!kernel)

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170 physProxy.writeBlob(GDTBase + numGDTEntries * 8,
171 (uint8_t *)(&csDescVal), 8);
172
173 numGDTEntries++;
174
175 SegSelector cs = 0;
176 cs.si = numGDTEntries - 1;
177
178 tc->setMiscReg(MISCREG_CS, (MiscReg)cs);
178 tc->setMiscReg(MISCREG_CS, (RegVal)cs);
179
180 // 32 bit data segment
181 SegDescriptor dsDesc = initDesc;
182 uint64_t dsDescVal = dsDesc;
183 physProxy.writeBlob(GDTBase + numGDTEntries * 8,
184 (uint8_t *)(&dsDescVal), 8);
185
186 numGDTEntries++;
187
188 SegSelector ds = 0;
189 ds.si = numGDTEntries - 1;
190
179
180 // 32 bit data segment
181 SegDescriptor dsDesc = initDesc;
182 uint64_t dsDescVal = dsDesc;
183 physProxy.writeBlob(GDTBase + numGDTEntries * 8,
184 (uint8_t *)(&dsDescVal), 8);
185
186 numGDTEntries++;
187
188 SegSelector ds = 0;
189 ds.si = numGDTEntries - 1;
190
191 tc->setMiscReg(MISCREG_DS, (MiscReg)ds);
192 tc->setMiscReg(MISCREG_ES, (MiscReg)ds);
193 tc->setMiscReg(MISCREG_FS, (MiscReg)ds);
194 tc->setMiscReg(MISCREG_GS, (MiscReg)ds);
195 tc->setMiscReg(MISCREG_SS, (MiscReg)ds);
191 tc->setMiscReg(MISCREG_DS, (RegVal)ds);
192 tc->setMiscReg(MISCREG_ES, (RegVal)ds);
193 tc->setMiscReg(MISCREG_FS, (RegVal)ds);
194 tc->setMiscReg(MISCREG_GS, (RegVal)ds);
195 tc->setMiscReg(MISCREG_SS, (RegVal)ds);
196
197 tc->setMiscReg(MISCREG_TSL, 0);
198 tc->setMiscReg(MISCREG_TSG_BASE, GDTBase);
199 tc->setMiscReg(MISCREG_TSG_LIMIT, 8 * numGDTEntries - 1);
200
201 SegDescriptor tssDesc = initDesc;
202 uint64_t tssDescVal = tssDesc;
203 physProxy.writeBlob(GDTBase + numGDTEntries * 8,
204 (uint8_t *)(&tssDescVal), 8);
205
206 numGDTEntries++;
207
208 SegSelector tss = 0;
209 tss.si = numGDTEntries - 1;
210
196
197 tc->setMiscReg(MISCREG_TSL, 0);
198 tc->setMiscReg(MISCREG_TSG_BASE, GDTBase);
199 tc->setMiscReg(MISCREG_TSG_LIMIT, 8 * numGDTEntries - 1);
200
201 SegDescriptor tssDesc = initDesc;
202 uint64_t tssDescVal = tssDesc;
203 physProxy.writeBlob(GDTBase + numGDTEntries * 8,
204 (uint8_t *)(&tssDescVal), 8);
205
206 numGDTEntries++;
207
208 SegSelector tss = 0;
209 tss.si = numGDTEntries - 1;
210
211 tc->setMiscReg(MISCREG_TR, (MiscReg)tss);
211 tc->setMiscReg(MISCREG_TR, (RegVal)tss);
212 installSegDesc(tc, SYS_SEGMENT_REG_TR, tssDesc, true);
213
214 /*
215 * Identity map the first 4GB of memory. In order to map this region
216 * of memory in long mode, there needs to be one actual page map level
217 * 4 entry which points to one page directory pointer table which
218 * points to 4 different page directory tables which are full of two
219 * megabyte pages. All of the other entries in valid tables are set

--- 156 unchanged lines hidden --- 		212 installSegDesc(tc, SYS_SEGMENT_REG_TR, tssDesc, true);
213
214 /*
215 * Identity map the first 4GB of memory. In order to map this region
216 * of memory in long mode, there needs to be one actual page map level
217 * 4 entry which points to one page directory pointer table which
218 * points to 4 different page directory tables which are full of two
219 * megabyte pages. All of the other entries in valid tables are set

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