pseudo_inst.cc (10553:c1ad57c53a36) pseudo_inst.cc (11659:b29aca3fcb75)
1/*
2 * Copyright (c) 2014 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 15 unchanged lines hidden (view full) ---

24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Alexandru Dutu
29 */
30
31#include "arch/x86/pseudo_inst.hh"
1/*
2 * Copyright (c) 2014 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 15 unchanged lines hidden (view full) ---

24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Alexandru Dutu
29 */
30
31#include "arch/x86/pseudo_inst.hh"
32#include "arch/x86/system.hh"
32#include "debug/PseudoInst.hh"
33#include "sim/process.hh"
33#include "debug/PseudoInst.hh"
34#include "sim/process.hh"
35#include "sim/system.hh"
34
35using namespace X86ISA;
36
37namespace X86ISA {
38
39/*
40 * This function is executed when the simulation is executing the syscall
41 * handler in System Emulation mode.

--- 15 unchanged lines hidden (view full) ---

57 */
58void
59m5PageFault(ThreadContext *tc)
60{
61 DPRINTF(PseudoInst, "PseudoInst::m5PageFault()\n");
62
63 Process *p = tc->getProcessPtr();
64 if (!p->fixupStackFault(tc->readMiscReg(MISCREG_CR2))) {
36
37using namespace X86ISA;
38
39namespace X86ISA {
40
41/*
42 * This function is executed when the simulation is executing the syscall
43 * handler in System Emulation mode.

--- 15 unchanged lines hidden (view full) ---

59 */
60void
61m5PageFault(ThreadContext *tc)
62{
63 DPRINTF(PseudoInst, "PseudoInst::m5PageFault()\n");
64
65 Process *p = tc->getProcessPtr();
66 if (!p->fixupStackFault(tc->readMiscReg(MISCREG_CR2))) {
65 panic("Page fault at %#x ", tc->readMiscReg(MISCREG_CR2));
66 }
67 SETranslatingPortProxy proxy = tc->getMemProxy();
68 // at this point we should have 6 values on the interrupt stack
69 int size = 6;
70 uint64_t is[size];
71 // reading the interrupt handler stack
72 proxy.readBlob(ISTVirtAddr + PageBytes - size*sizeof(uint64_t),
73 (uint8_t *)&is, sizeof(is));
74 panic("Page fault at addr %#x\n\tInterrupt handler stack:\n"
75 "\tss: %#x\n"
76 "\trsp: %#x\n"
77 "\trflags: %#x\n"
78 "\tcs: %#x\n"
79 "\trip: %#x\n"
80 "\terr_code: %#x\n",
81 tc->readMiscReg(MISCREG_CR2),
82 is[5], is[4], is[3], is[2], is[1], is[0]);
83 }
67}
68
69} // namespace X86ISA
84}
85
86} // namespace X86ISA