1/*
2 * Copyright (c) 2014 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Alexandru Dutu
29 */
30
31#include "arch/x86/pseudo_inst.hh"
32#include "debug/PseudoInst.hh"
33#include "sim/process.hh"
34
35using namespace X86ISA;
36
37namespace X86ISA {
38
39/*
40 * This function is executed when the simulation is executing the syscall
41 * handler in System Emulation mode.

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57 */
58void
59m5PageFault(ThreadContext *tc)
60{
61 DPRINTF(PseudoInst, "PseudoInst::m5PageFault()\n");
62
63 Process *p = tc->getProcessPtr();
64 if (!p->fixupStackFault(tc->readMiscReg(MISCREG_CR2))) {
65 panic("Page fault at %#x ", tc->readMiscReg(MISCREG_CR2));
66 }
67}
68
69} // namespace X86ISA