process.cc (7073:b8f2983a1c88) process.cc (7087:fb8d5786ff30)
1/*
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Ali Saidi
30 */
31
14 * Copyright (c) 2003-2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Gabe Black
41 * Ali Saidi
42 */
43
32/*
33 * Copyright (c) 2007 The Hewlett-Packard Development Company
34 * All rights reserved.
35 *
36 * Redistribution and use of this software in source and binary forms,
37 * with or without modification, are permitted provided that the
38 * following conditions are met:
39 *
40 * The software must be used only for Non-Commercial Use which means any
41 * use which is NOT directed to receiving any direct monetary
42 * compensation for, or commercial advantage from such use. Illustrative
43 * examples of non-commercial use are academic research, personal study,
44 * teaching, education and corporate research & development.
45 * Illustrative examples of commercial use are distributing products for
46 * commercial advantage and providing services using the software for
47 * commercial advantage.
48 *
49 * If you wish to use this software or functionality therein that may be
50 * covered by patents for commercial use, please contact:
51 * Director of Intellectual Property Licensing
52 * Office of Strategy and Technology
53 * Hewlett-Packard Company
54 * 1501 Page Mill Road
55 * Palo Alto, California 94304
56 *
57 * Redistributions of source code must retain the above copyright notice,
58 * this list of conditions and the following disclaimer. Redistributions
59 * in binary form must reproduce the above copyright notice, this list of
60 * conditions and the following disclaimer in the documentation and/or
61 * other materials provided with the distribution. Neither the name of
62 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
63 * contributors may be used to endorse or promote products derived from
64 * this software without specific prior written permission. No right of
65 * sublicense is granted herewith. Derivatives of the software and
66 * output created using the software may be prepared, but only for
67 * Non-Commercial Uses. Derivatives of the software may be shared with
68 * others provided: (i) the others agree to abide by the list of
69 * conditions herein which includes the Non-Commercial Use restrictions;
70 * and (ii) such Derivatives of the software include the above copyright
71 * notice to acknowledge the contribution from this software where
72 * applicable, this list of conditions and the disclaimer below.
73 *
74 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
75 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
76 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
77 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
78 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
79 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
80 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
81 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
82 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
83 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
84 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
85 *
86 * Authors: Gabe Black
87 */
88
89#include "arch/x86/isa_traits.hh"
90#include "arch/x86/miscregs.hh"
91#include "arch/x86/process.hh"
92#include "arch/x86/segmentregs.hh"
93#include "arch/x86/types.hh"
94#include "base/loader/object_file.hh"
95#include "base/loader/elf_object.hh"
96#include "base/misc.hh"
97#include "base/trace.hh"
98#include "cpu/thread_context.hh"
99#include "mem/page_table.hh"
100#include "mem/translating_port.hh"
101#include "sim/process_impl.hh"
102#include "sim/syscall_emul.hh"
103#include "sim/system.hh"
104
105using namespace std;
106using namespace X86ISA;
107
108static const int ArgumentReg[] = {
109 INTREG_RDI,
110 INTREG_RSI,
111 INTREG_RDX,
112 //This argument register is r10 for syscalls and rcx for C.
113 INTREG_R10W,
114 //INTREG_RCX,
115 INTREG_R8W,
116 INTREG_R9W
117};
118static const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
119static const int ArgumentReg32[] = {
120 INTREG_EBX,
121 INTREG_ECX,
122 INTREG_EDX,
123 INTREG_ESI,
124 INTREG_EDI,
125};
126static const int NumArgumentRegs32 = sizeof(ArgumentReg) / sizeof(const int);
127
128X86LiveProcess::X86LiveProcess(LiveProcessParams * params, ObjectFile *objFile,
129 SyscallDesc *_syscallDescs, int _numSyscallDescs) :
130 LiveProcess(params, objFile), syscallDescs(_syscallDescs),
131 numSyscallDescs(_numSyscallDescs)
132{
133 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
134 brk_point = roundUp(brk_point, VMPageSize);
135}
136
137X86_64LiveProcess::X86_64LiveProcess(LiveProcessParams *params,
138 ObjectFile *objFile, SyscallDesc *_syscallDescs,
139 int _numSyscallDescs) :
140 X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs)
141{
142
143 vsyscallPage.base = 0xffffffffff600000ULL;
144 vsyscallPage.size = VMPageSize;
145 vsyscallPage.vtimeOffset = 0x400;
146 vsyscallPage.vgettimeofdayOffset = 0x410;
147
148 // Set up stack. On X86_64 Linux, stack goes from the top of memory
149 // downward, less the hole for the kernel address space plus one page
150 // for undertermined purposes.
151 stack_base = (Addr)0x7FFFFFFFF000ULL;
152
153 // Set pointer for next thread stack. Reserve 8M for main stack.
154 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
155
156 // Set up region for mmaps. This was determined empirically and may not
157 // always be correct.
158 mmap_start = mmap_end = (Addr)0x2aaaaaaab000ULL;
159}
160
161void
162I386LiveProcess::syscall(int64_t callnum, ThreadContext *tc)
163{
164 Addr eip = tc->readPC();
165 if (eip >= vsyscallPage.base &&
166 eip < vsyscallPage.base + vsyscallPage.size) {
167 tc->setNextPC(vsyscallPage.base + vsyscallPage.vsysexitOffset);
168 }
169 X86LiveProcess::syscall(callnum, tc);
170}
171
172
173I386LiveProcess::I386LiveProcess(LiveProcessParams *params,
174 ObjectFile *objFile, SyscallDesc *_syscallDescs,
175 int _numSyscallDescs) :
176 X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs)
177{
178 _gdtStart = ULL(0x100000000);
179 _gdtSize = VMPageSize;
180
181 vsyscallPage.base = 0xffffe000ULL;
182 vsyscallPage.size = VMPageSize;
183 vsyscallPage.vsyscallOffset = 0x400;
184 vsyscallPage.vsysexitOffset = 0x410;
185
186 stack_base = vsyscallPage.base;
187
188 // Set pointer for next thread stack. Reserve 8M for main stack.
189 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
190
191 // Set up region for mmaps. This was determined empirically and may not
192 // always be correct.
193 mmap_start = mmap_end = (Addr)0xf7ffe000ULL;
194}
195
196SyscallDesc*
197X86LiveProcess::getDesc(int callnum)
198{
199 if (callnum < 0 || callnum >= numSyscallDescs)
200 return NULL;
201 return &syscallDescs[callnum];
202}
203
204void
205X86_64LiveProcess::startup()
206{
207 LiveProcess::startup();
208
209 if (checkpointRestored)
210 return;
211
212 argsInit(sizeof(uint64_t), VMPageSize);
213
214 // Set up the vsyscall page for this process.
215 pTable->allocate(vsyscallPage.base, vsyscallPage.size);
216 uint8_t vtimeBlob[] = {
217 0x48,0xc7,0xc0,0xc9,0x00,0x00,0x00, // mov $0xc9,%rax
218 0x0f,0x05, // syscall
219 0xc3 // retq
220 };
221 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vtimeOffset,
222 vtimeBlob, sizeof(vtimeBlob));
223
224 uint8_t vgettimeofdayBlob[] = {
225 0x48,0xc7,0xc0,0x60,0x00,0x00,0x00, // mov $0x60,%rax
226 0x0f,0x05, // syscall
227 0xc3 // retq
228 };
229 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vgettimeofdayOffset,
230 vgettimeofdayBlob, sizeof(vgettimeofdayBlob));
231
232 for (int i = 0; i < contextIds.size(); i++) {
233 ThreadContext * tc = system->getThreadContext(contextIds[i]);
234
235 SegAttr dataAttr = 0;
236 dataAttr.dpl = 3;
237 dataAttr.unusable = 0;
238 dataAttr.defaultSize = 1;
239 dataAttr.longMode = 1;
240 dataAttr.avl = 0;
241 dataAttr.granularity = 1;
242 dataAttr.present = 1;
243 dataAttr.type = 3;
244 dataAttr.writable = 1;
245 dataAttr.readable = 1;
246 dataAttr.expandDown = 0;
247 dataAttr.system = 1;
248
249 //Initialize the segment registers.
250 for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) {
251 tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0);
252 tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0);
253 tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr);
254 }
255
256 SegAttr csAttr = 0;
257 csAttr.dpl = 3;
258 csAttr.unusable = 0;
259 csAttr.defaultSize = 0;
260 csAttr.longMode = 1;
261 csAttr.avl = 0;
262 csAttr.granularity = 1;
263 csAttr.present = 1;
264 csAttr.type = 10;
265 csAttr.writable = 0;
266 csAttr.readable = 1;
267 csAttr.expandDown = 0;
268 csAttr.system = 1;
269
270 tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr);
271
272 Efer efer = 0;
273 efer.sce = 1; // Enable system call extensions.
274 efer.lme = 1; // Enable long mode.
275 efer.lma = 1; // Activate long mode.
276 efer.nxe = 1; // Enable nx support.
277 efer.svme = 0; // Disable svm support for now. It isn't implemented.
278 efer.ffxsr = 1; // Turn on fast fxsave and fxrstor.
279 tc->setMiscReg(MISCREG_EFER, efer);
280
281 //Set up the registers that describe the operating mode.
282 CR0 cr0 = 0;
283 cr0.pg = 1; // Turn on paging.
284 cr0.cd = 0; // Don't disable caching.
285 cr0.nw = 0; // This is bit is defined to be ignored.
286 cr0.am = 0; // No alignment checking
287 cr0.wp = 0; // Supervisor mode can write read only pages
288 cr0.ne = 1;
289 cr0.et = 1; // This should always be 1
290 cr0.ts = 0; // We don't do task switching, so causing fp exceptions
291 // would be pointless.
292 cr0.em = 0; // Allow x87 instructions to execute natively.
293 cr0.mp = 1; // This doesn't really matter, but the manual suggests
294 // setting it to one.
295 cr0.pe = 1; // We're definitely in protected mode.
296 tc->setMiscReg(MISCREG_CR0, cr0);
297
298 tc->setMiscReg(MISCREG_MXCSR, 0x1f80);
299 }
300}
301
302void
303I386LiveProcess::startup()
304{
305 LiveProcess::startup();
306
307 if (checkpointRestored)
308 return;
309
310 argsInit(sizeof(uint32_t), VMPageSize);
311
312 /*
313 * Set up a GDT for this process. The whole GDT wouldn't really be for
314 * this process, but the only parts we care about are.
315 */
316 pTable->allocate(_gdtStart, _gdtSize);
317 uint64_t zero = 0;
318 assert(_gdtSize % sizeof(zero) == 0);
319 for (Addr gdtCurrent = _gdtStart;
320 gdtCurrent < _gdtStart + _gdtSize; gdtCurrent += sizeof(zero)) {
321 initVirtMem->write(gdtCurrent, zero);
322 }
323
324 // Set up the vsyscall page for this process.
325 pTable->allocate(vsyscallPage.base, vsyscallPage.size);
326 uint8_t vsyscallBlob[] = {
327 0x51, // push %ecx
328 0x52, // push %edp
329 0x55, // push %ebp
330 0x89, 0xe5, // mov %esp, %ebp
331 0x0f, 0x34 // sysenter
332 };
333 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsyscallOffset,
334 vsyscallBlob, sizeof(vsyscallBlob));
335
336 uint8_t vsysexitBlob[] = {
337 0x5d, // pop %ebp
338 0x5a, // pop %edx
339 0x59, // pop %ecx
340 0xc3 // ret
341 };
342 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsysexitOffset,
343 vsysexitBlob, sizeof(vsysexitBlob));
344
345 for (int i = 0; i < contextIds.size(); i++) {
346 ThreadContext * tc = system->getThreadContext(contextIds[i]);
347
348 SegAttr dataAttr = 0;
349 dataAttr.dpl = 3;
350 dataAttr.unusable = 0;
351 dataAttr.defaultSize = 1;
352 dataAttr.longMode = 0;
353 dataAttr.avl = 0;
354 dataAttr.granularity = 1;
355 dataAttr.present = 1;
356 dataAttr.type = 3;
357 dataAttr.writable = 1;
358 dataAttr.readable = 1;
359 dataAttr.expandDown = 0;
360 dataAttr.system = 1;
361
362 //Initialize the segment registers.
363 for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) {
364 tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0);
365 tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0);
366 tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr);
367 tc->setMiscRegNoEffect(MISCREG_SEG_SEL(seg), 0xB);
368 tc->setMiscRegNoEffect(MISCREG_SEG_LIMIT(seg), (uint32_t)(-1));
369 }
370
371 SegAttr csAttr = 0;
372 csAttr.dpl = 3;
373 csAttr.unusable = 0;
374 csAttr.defaultSize = 1;
375 csAttr.longMode = 0;
376 csAttr.avl = 0;
377 csAttr.granularity = 1;
378 csAttr.present = 1;
379 csAttr.type = 0xa;
380 csAttr.writable = 0;
381 csAttr.readable = 1;
382 csAttr.expandDown = 0;
383 csAttr.system = 1;
384
385 tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr);
386
387 tc->setMiscRegNoEffect(MISCREG_TSG_BASE, _gdtStart);
388 tc->setMiscRegNoEffect(MISCREG_TSG_EFF_BASE, _gdtStart);
389 tc->setMiscRegNoEffect(MISCREG_TSG_LIMIT, _gdtStart + _gdtSize - 1);
390
391 // Set the LDT selector to 0 to deactivate it.
392 tc->setMiscRegNoEffect(MISCREG_TSL, 0);
393
394 Efer efer = 0;
395 efer.sce = 1; // Enable system call extensions.
396 efer.lme = 1; // Enable long mode.
397 efer.lma = 0; // Deactivate long mode.
398 efer.nxe = 1; // Enable nx support.
399 efer.svme = 0; // Disable svm support for now. It isn't implemented.
400 efer.ffxsr = 1; // Turn on fast fxsave and fxrstor.
401 tc->setMiscReg(MISCREG_EFER, efer);
402
403 //Set up the registers that describe the operating mode.
404 CR0 cr0 = 0;
405 cr0.pg = 1; // Turn on paging.
406 cr0.cd = 0; // Don't disable caching.
407 cr0.nw = 0; // This is bit is defined to be ignored.
408 cr0.am = 0; // No alignment checking
409 cr0.wp = 0; // Supervisor mode can write read only pages
410 cr0.ne = 1;
411 cr0.et = 1; // This should always be 1
412 cr0.ts = 0; // We don't do task switching, so causing fp exceptions
413 // would be pointless.
414 cr0.em = 0; // Allow x87 instructions to execute natively.
415 cr0.mp = 1; // This doesn't really matter, but the manual suggests
416 // setting it to one.
417 cr0.pe = 1; // We're definitely in protected mode.
418 tc->setMiscReg(MISCREG_CR0, cr0);
419
420 tc->setMiscReg(MISCREG_MXCSR, 0x1f80);
421 }
422}
423
424template<class IntType>
425void
426X86LiveProcess::argsInit(int pageSize,
427 std::vector<AuxVector<IntType> > extraAuxvs)
428{
429 int intSize = sizeof(IntType);
430
431 typedef AuxVector<IntType> auxv_t;
432 std::vector<auxv_t> auxv = extraAuxvs;
433
434 string filename;
435 if(argv.size() < 1)
436 filename = "";
437 else
438 filename = argv[0];
439
440 //We want 16 byte alignment
441 uint64_t align = 16;
442
443 // load object file into target memory
444 objFile->loadSections(initVirtMem);
445
446 enum X86CpuFeature {
447 X86_OnboardFPU = 1 << 0,
448 X86_VirtualModeExtensions = 1 << 1,
449 X86_DebuggingExtensions = 1 << 2,
450 X86_PageSizeExtensions = 1 << 3,
451
452 X86_TimeStampCounter = 1 << 4,
453 X86_ModelSpecificRegisters = 1 << 5,
454 X86_PhysicalAddressExtensions = 1 << 6,
455 X86_MachineCheckExtensions = 1 << 7,
456
457 X86_CMPXCHG8Instruction = 1 << 8,
458 X86_OnboardAPIC = 1 << 9,
459 X86_SYSENTER_SYSEXIT = 1 << 11,
460
461 X86_MemoryTypeRangeRegisters = 1 << 12,
462 X86_PageGlobalEnable = 1 << 13,
463 X86_MachineCheckArchitecture = 1 << 14,
464 X86_CMOVInstruction = 1 << 15,
465
466 X86_PageAttributeTable = 1 << 16,
467 X86_36BitPSEs = 1 << 17,
468 X86_ProcessorSerialNumber = 1 << 18,
469 X86_CLFLUSHInstruction = 1 << 19,
470
471 X86_DebugTraceStore = 1 << 21,
472 X86_ACPIViaMSR = 1 << 22,
473 X86_MultimediaExtensions = 1 << 23,
474
475 X86_FXSAVE_FXRSTOR = 1 << 24,
476 X86_StreamingSIMDExtensions = 1 << 25,
477 X86_StreamingSIMDExtensions2 = 1 << 26,
478 X86_CPUSelfSnoop = 1 << 27,
479
480 X86_HyperThreading = 1 << 28,
481 X86_AutomaticClockControl = 1 << 29,
482 X86_IA64Processor = 1 << 30
483 };
484
485 //Setup the auxilliary vectors. These will already have endian conversion.
486 //Auxilliary vectors are loaded only for elf formatted executables.
487 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
488 if(elfObject)
489 {
490 uint64_t features =
491 X86_OnboardFPU |
492 X86_VirtualModeExtensions |
493 X86_DebuggingExtensions |
494 X86_PageSizeExtensions |
495 X86_TimeStampCounter |
496 X86_ModelSpecificRegisters |
497 X86_PhysicalAddressExtensions |
498 X86_MachineCheckExtensions |
499 X86_CMPXCHG8Instruction |
500 X86_OnboardAPIC |
501 X86_SYSENTER_SYSEXIT |
502 X86_MemoryTypeRangeRegisters |
503 X86_PageGlobalEnable |
504 X86_MachineCheckArchitecture |
505 X86_CMOVInstruction |
506 X86_PageAttributeTable |
507 X86_36BitPSEs |
508// X86_ProcessorSerialNumber |
509 X86_CLFLUSHInstruction |
510// X86_DebugTraceStore |
511// X86_ACPIViaMSR |
512 X86_MultimediaExtensions |
513 X86_FXSAVE_FXRSTOR |
514 X86_StreamingSIMDExtensions |
515 X86_StreamingSIMDExtensions2 |
516// X86_CPUSelfSnoop |
517// X86_HyperThreading |
518// X86_AutomaticClockControl |
519// X86_IA64Processor |
520 0;
521
522 //Bits which describe the system hardware capabilities
523 //XXX Figure out what these should be
524 auxv.push_back(auxv_t(M5_AT_HWCAP, features));
525 //The system page size
526 auxv.push_back(auxv_t(M5_AT_PAGESZ, X86ISA::VMPageSize));
527 //Frequency at which times() increments
528 //Defined to be 100 in the kernel source.
529 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
530 // For statically linked executables, this is the virtual address of the
531 // program header tables if they appear in the executable image
532 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
533 // This is the size of a program header entry from the elf file.
534 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
535 // This is the number of program headers from the original elf file.
536 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
537 //This is the address of the elf "interpreter", It should be set
538 //to 0 for regular executables. It should be something else
539 //(not sure what) for dynamic libraries.
540 auxv.push_back(auxv_t(M5_AT_BASE, 0));
541
542 //XXX Figure out what this should be.
543 auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
544 //The entry point to the program
545 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
546 //Different user and group IDs
547 auxv.push_back(auxv_t(M5_AT_UID, uid()));
548 auxv.push_back(auxv_t(M5_AT_EUID, euid()));
549 auxv.push_back(auxv_t(M5_AT_GID, gid()));
550 auxv.push_back(auxv_t(M5_AT_EGID, egid()));
551 //Whether to enable "secure mode" in the executable
552 auxv.push_back(auxv_t(M5_AT_SECURE, 0));
553 //The address of 16 "random" bytes.
554 auxv.push_back(auxv_t(M5_AT_RANDOM, 0));
555 //The name of the program
556 auxv.push_back(auxv_t(M5_AT_EXECFN, 0));
557 //The platform string
558 auxv.push_back(auxv_t(M5_AT_PLATFORM, 0));
559 }
560
561 //Figure out how big the initial stack needs to be
562
563 // A sentry NULL void pointer at the top of the stack.
564 int sentry_size = intSize;
565
566 //This is the name of the file which is present on the initial stack
567 //It's purpose is to let the user space linker examine the original file.
568 int file_name_size = filename.size() + 1;
569
570 const int numRandomBytes = 16;
571 int aux_data_size = numRandomBytes;
572
573 string platform = "x86_64";
574 aux_data_size += platform.size() + 1;
575
576 int env_data_size = 0;
577 for (int i = 0; i < envp.size(); ++i) {
578 env_data_size += envp[i].size() + 1;
579 }
580 int arg_data_size = 0;
581 for (int i = 0; i < argv.size(); ++i) {
582 arg_data_size += argv[i].size() + 1;
583 }
584
585 //The info_block needs to be padded so it's size is a multiple of the
586 //alignment mask. Also, it appears that there needs to be at least some
587 //padding, so if the size is already a multiple, we need to increase it
588 //anyway.
589 int base_info_block_size =
590 sentry_size + file_name_size + env_data_size + arg_data_size;
591
592 int info_block_size = roundUp(base_info_block_size, align);
593
594 int info_block_padding = info_block_size - base_info_block_size;
595
596 //Each auxilliary vector is two 8 byte words
597 int aux_array_size = intSize * 2 * (auxv.size() + 1);
598
599 int envp_array_size = intSize * (envp.size() + 1);
600 int argv_array_size = intSize * (argv.size() + 1);
601
602 int argc_size = intSize;
603
604 //Figure out the size of the contents of the actual initial frame
605 int frame_size =
606 aux_array_size +
607 envp_array_size +
608 argv_array_size +
609 argc_size;
610
611 //There needs to be padding after the auxiliary vector data so that the
612 //very bottom of the stack is aligned properly.
613 int partial_size = frame_size + aux_data_size;
614 int aligned_partial_size = roundUp(partial_size, align);
615 int aux_padding = aligned_partial_size - partial_size;
616
617 int space_needed =
618 info_block_size +
619 aux_data_size +
620 aux_padding +
621 frame_size;
622
623 stack_min = stack_base - space_needed;
624 stack_min = roundDown(stack_min, align);
625 stack_size = stack_base - stack_min;
626
627 // map memory
628 pTable->allocate(roundDown(stack_min, pageSize),
629 roundUp(stack_size, pageSize));
630
631 // map out initial stack contents
632 IntType sentry_base = stack_base - sentry_size;
633 IntType file_name_base = sentry_base - file_name_size;
634 IntType env_data_base = file_name_base - env_data_size;
635 IntType arg_data_base = env_data_base - arg_data_size;
636 IntType aux_data_base = arg_data_base - info_block_padding - aux_data_size;
637 IntType auxv_array_base = aux_data_base - aux_array_size - aux_padding;
638 IntType envp_array_base = auxv_array_base - envp_array_size;
639 IntType argv_array_base = envp_array_base - argv_array_size;
640 IntType argc_base = argv_array_base - argc_size;
641
642 DPRINTF(Stack, "The addresses of items on the initial stack:\n");
643 DPRINTF(Stack, "0x%x - file name\n", file_name_base);
644 DPRINTF(Stack, "0x%x - env data\n", env_data_base);
645 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base);
646 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base);
647 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base);
648 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base);
649 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base);
650 DPRINTF(Stack, "0x%x - argc \n", argc_base);
651 DPRINTF(Stack, "0x%x - stack min\n", stack_min);
652
653 // write contents to stack
654
655 // figure out argc
656 IntType argc = argv.size();
657 IntType guestArgc = X86ISA::htog(argc);
658
659 //Write out the sentry void *
660 IntType sentry_NULL = 0;
661 initVirtMem->writeBlob(sentry_base,
662 (uint8_t*)&sentry_NULL, sentry_size);
663
664 //Write the file name
665 initVirtMem->writeString(file_name_base, filename.c_str());
666
667 //Fix up the aux vectors which point to data
668 assert(auxv[auxv.size() - 3].a_type == M5_AT_RANDOM);
669 auxv[auxv.size() - 3].a_val = aux_data_base;
670 assert(auxv[auxv.size() - 2].a_type == M5_AT_EXECFN);
671 auxv[auxv.size() - 2].a_val = argv_array_base;
672 assert(auxv[auxv.size() - 1].a_type == M5_AT_PLATFORM);
673 auxv[auxv.size() - 1].a_val = aux_data_base + numRandomBytes;
674
675 //Copy the aux stuff
676 for(int x = 0; x < auxv.size(); x++)
677 {
678 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
679 (uint8_t*)&(auxv[x].a_type), intSize);
680 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
681 (uint8_t*)&(auxv[x].a_val), intSize);
682 }
683 //Write out the terminating zeroed auxilliary vector
684 const uint64_t zero = 0;
685 initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
686 (uint8_t*)&zero, 2 * intSize);
687
688 initVirtMem->writeString(aux_data_base, platform.c_str());
689
690 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
691 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
692
693 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
694
695 ThreadContext *tc = system->getThreadContext(contextIds[0]);
696 //Set the stack pointer register
697 tc->setIntReg(StackPointerReg, stack_min);
698
699 Addr prog_entry = objFile->entryPoint();
700 // There doesn't need to be any segment base added in since we're dealing
701 // with the flat segmentation model.
702 tc->setPC(prog_entry);
703 tc->setNextPC(prog_entry + sizeof(MachInst));
704
705 //Align the "stack_min" to a page boundary.
706 stack_min = roundDown(stack_min, pageSize);
707
708// num_processes++;
709}
710
711void
712X86_64LiveProcess::argsInit(int intSize, int pageSize)
713{
714 std::vector<AuxVector<uint64_t> > extraAuxvs;
715 extraAuxvs.push_back(AuxVector<uint64_t>(M5_AT_SYSINFO_EHDR,
716 vsyscallPage.base));
717 X86LiveProcess::argsInit<uint64_t>(pageSize, extraAuxvs);
718}
719
720void
721I386LiveProcess::argsInit(int intSize, int pageSize)
722{
723 std::vector<AuxVector<uint32_t> > extraAuxvs;
724 //Tell the binary where the vsyscall part of the vsyscall page is.
725 extraAuxvs.push_back(AuxVector<uint32_t>(M5_AT_SYSINFO,
726 vsyscallPage.base + vsyscallPage.vsyscallOffset));
727 extraAuxvs.push_back(AuxVector<uint32_t>(M5_AT_SYSINFO_EHDR,
728 vsyscallPage.base));
729 X86LiveProcess::argsInit<uint32_t>(pageSize, extraAuxvs);
730}
731
732void
733X86LiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn return_value)
734{
735 tc->setIntReg(INTREG_RAX, return_value.value());
736}
737
738X86ISA::IntReg
739X86_64LiveProcess::getSyscallArg(ThreadContext *tc, int &i)
740{
741 assert(i < NumArgumentRegs);
742 return tc->readIntReg(ArgumentReg[i++]);
743}
744
745void
746X86_64LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val)
747{
748 assert(i < NumArgumentRegs);
749 return tc->setIntReg(ArgumentReg[i], val);
750}
751
752X86ISA::IntReg
753I386LiveProcess::getSyscallArg(ThreadContext *tc, int &i)
754{
755 assert(i < NumArgumentRegs32);
756 return tc->readIntReg(ArgumentReg32[i++]);
757}
758
759X86ISA::IntReg
760I386LiveProcess::getSyscallArg(ThreadContext *tc, int &i, int width)
761{
762 assert(width == 32 || width == 64);
763 assert(i < NumArgumentRegs);
764 uint64_t retVal = tc->readIntReg(ArgumentReg32[i++]) & mask(32);
765 if (width == 64)
766 retVal |= ((uint64_t)tc->readIntReg(ArgumentReg[i++]) << 32);
767 return retVal;
768}
769
770void
771I386LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val)
772{
773 assert(i < NumArgumentRegs);
774 return tc->setIntReg(ArgumentReg[i], val);
775}
44#include "arch/x86/isa_traits.hh"
45#include "arch/x86/miscregs.hh"
46#include "arch/x86/process.hh"
47#include "arch/x86/segmentregs.hh"
48#include "arch/x86/types.hh"
49#include "base/loader/object_file.hh"
50#include "base/loader/elf_object.hh"
51#include "base/misc.hh"
52#include "base/trace.hh"
53#include "cpu/thread_context.hh"
54#include "mem/page_table.hh"
55#include "mem/translating_port.hh"
56#include "sim/process_impl.hh"
57#include "sim/syscall_emul.hh"
58#include "sim/system.hh"
59
60using namespace std;
61using namespace X86ISA;
62
63static const int ArgumentReg[] = {
64 INTREG_RDI,
65 INTREG_RSI,
66 INTREG_RDX,
67 //This argument register is r10 for syscalls and rcx for C.
68 INTREG_R10W,
69 //INTREG_RCX,
70 INTREG_R8W,
71 INTREG_R9W
72};
73static const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
74static const int ArgumentReg32[] = {
75 INTREG_EBX,
76 INTREG_ECX,
77 INTREG_EDX,
78 INTREG_ESI,
79 INTREG_EDI,
80};
81static const int NumArgumentRegs32 = sizeof(ArgumentReg) / sizeof(const int);
82
83X86LiveProcess::X86LiveProcess(LiveProcessParams * params, ObjectFile *objFile,
84 SyscallDesc *_syscallDescs, int _numSyscallDescs) :
85 LiveProcess(params, objFile), syscallDescs(_syscallDescs),
86 numSyscallDescs(_numSyscallDescs)
87{
88 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
89 brk_point = roundUp(brk_point, VMPageSize);
90}
91
92X86_64LiveProcess::X86_64LiveProcess(LiveProcessParams *params,
93 ObjectFile *objFile, SyscallDesc *_syscallDescs,
94 int _numSyscallDescs) :
95 X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs)
96{
97
98 vsyscallPage.base = 0xffffffffff600000ULL;
99 vsyscallPage.size = VMPageSize;
100 vsyscallPage.vtimeOffset = 0x400;
101 vsyscallPage.vgettimeofdayOffset = 0x410;
102
103 // Set up stack. On X86_64 Linux, stack goes from the top of memory
104 // downward, less the hole for the kernel address space plus one page
105 // for undertermined purposes.
106 stack_base = (Addr)0x7FFFFFFFF000ULL;
107
108 // Set pointer for next thread stack. Reserve 8M for main stack.
109 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
110
111 // Set up region for mmaps. This was determined empirically and may not
112 // always be correct.
113 mmap_start = mmap_end = (Addr)0x2aaaaaaab000ULL;
114}
115
116void
117I386LiveProcess::syscall(int64_t callnum, ThreadContext *tc)
118{
119 Addr eip = tc->readPC();
120 if (eip >= vsyscallPage.base &&
121 eip < vsyscallPage.base + vsyscallPage.size) {
122 tc->setNextPC(vsyscallPage.base + vsyscallPage.vsysexitOffset);
123 }
124 X86LiveProcess::syscall(callnum, tc);
125}
126
127
128I386LiveProcess::I386LiveProcess(LiveProcessParams *params,
129 ObjectFile *objFile, SyscallDesc *_syscallDescs,
130 int _numSyscallDescs) :
131 X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs)
132{
133 _gdtStart = ULL(0x100000000);
134 _gdtSize = VMPageSize;
135
136 vsyscallPage.base = 0xffffe000ULL;
137 vsyscallPage.size = VMPageSize;
138 vsyscallPage.vsyscallOffset = 0x400;
139 vsyscallPage.vsysexitOffset = 0x410;
140
141 stack_base = vsyscallPage.base;
142
143 // Set pointer for next thread stack. Reserve 8M for main stack.
144 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
145
146 // Set up region for mmaps. This was determined empirically and may not
147 // always be correct.
148 mmap_start = mmap_end = (Addr)0xf7ffe000ULL;
149}
150
151SyscallDesc*
152X86LiveProcess::getDesc(int callnum)
153{
154 if (callnum < 0 || callnum >= numSyscallDescs)
155 return NULL;
156 return &syscallDescs[callnum];
157}
158
159void
160X86_64LiveProcess::startup()
161{
162 LiveProcess::startup();
163
164 if (checkpointRestored)
165 return;
166
167 argsInit(sizeof(uint64_t), VMPageSize);
168
169 // Set up the vsyscall page for this process.
170 pTable->allocate(vsyscallPage.base, vsyscallPage.size);
171 uint8_t vtimeBlob[] = {
172 0x48,0xc7,0xc0,0xc9,0x00,0x00,0x00, // mov $0xc9,%rax
173 0x0f,0x05, // syscall
174 0xc3 // retq
175 };
176 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vtimeOffset,
177 vtimeBlob, sizeof(vtimeBlob));
178
179 uint8_t vgettimeofdayBlob[] = {
180 0x48,0xc7,0xc0,0x60,0x00,0x00,0x00, // mov $0x60,%rax
181 0x0f,0x05, // syscall
182 0xc3 // retq
183 };
184 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vgettimeofdayOffset,
185 vgettimeofdayBlob, sizeof(vgettimeofdayBlob));
186
187 for (int i = 0; i < contextIds.size(); i++) {
188 ThreadContext * tc = system->getThreadContext(contextIds[i]);
189
190 SegAttr dataAttr = 0;
191 dataAttr.dpl = 3;
192 dataAttr.unusable = 0;
193 dataAttr.defaultSize = 1;
194 dataAttr.longMode = 1;
195 dataAttr.avl = 0;
196 dataAttr.granularity = 1;
197 dataAttr.present = 1;
198 dataAttr.type = 3;
199 dataAttr.writable = 1;
200 dataAttr.readable = 1;
201 dataAttr.expandDown = 0;
202 dataAttr.system = 1;
203
204 //Initialize the segment registers.
205 for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) {
206 tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0);
207 tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0);
208 tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr);
209 }
210
211 SegAttr csAttr = 0;
212 csAttr.dpl = 3;
213 csAttr.unusable = 0;
214 csAttr.defaultSize = 0;
215 csAttr.longMode = 1;
216 csAttr.avl = 0;
217 csAttr.granularity = 1;
218 csAttr.present = 1;
219 csAttr.type = 10;
220 csAttr.writable = 0;
221 csAttr.readable = 1;
222 csAttr.expandDown = 0;
223 csAttr.system = 1;
224
225 tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr);
226
227 Efer efer = 0;
228 efer.sce = 1; // Enable system call extensions.
229 efer.lme = 1; // Enable long mode.
230 efer.lma = 1; // Activate long mode.
231 efer.nxe = 1; // Enable nx support.
232 efer.svme = 0; // Disable svm support for now. It isn't implemented.
233 efer.ffxsr = 1; // Turn on fast fxsave and fxrstor.
234 tc->setMiscReg(MISCREG_EFER, efer);
235
236 //Set up the registers that describe the operating mode.
237 CR0 cr0 = 0;
238 cr0.pg = 1; // Turn on paging.
239 cr0.cd = 0; // Don't disable caching.
240 cr0.nw = 0; // This is bit is defined to be ignored.
241 cr0.am = 0; // No alignment checking
242 cr0.wp = 0; // Supervisor mode can write read only pages
243 cr0.ne = 1;
244 cr0.et = 1; // This should always be 1
245 cr0.ts = 0; // We don't do task switching, so causing fp exceptions
246 // would be pointless.
247 cr0.em = 0; // Allow x87 instructions to execute natively.
248 cr0.mp = 1; // This doesn't really matter, but the manual suggests
249 // setting it to one.
250 cr0.pe = 1; // We're definitely in protected mode.
251 tc->setMiscReg(MISCREG_CR0, cr0);
252
253 tc->setMiscReg(MISCREG_MXCSR, 0x1f80);
254 }
255}
256
257void
258I386LiveProcess::startup()
259{
260 LiveProcess::startup();
261
262 if (checkpointRestored)
263 return;
264
265 argsInit(sizeof(uint32_t), VMPageSize);
266
267 /*
268 * Set up a GDT for this process. The whole GDT wouldn't really be for
269 * this process, but the only parts we care about are.
270 */
271 pTable->allocate(_gdtStart, _gdtSize);
272 uint64_t zero = 0;
273 assert(_gdtSize % sizeof(zero) == 0);
274 for (Addr gdtCurrent = _gdtStart;
275 gdtCurrent < _gdtStart + _gdtSize; gdtCurrent += sizeof(zero)) {
276 initVirtMem->write(gdtCurrent, zero);
277 }
278
279 // Set up the vsyscall page for this process.
280 pTable->allocate(vsyscallPage.base, vsyscallPage.size);
281 uint8_t vsyscallBlob[] = {
282 0x51, // push %ecx
283 0x52, // push %edp
284 0x55, // push %ebp
285 0x89, 0xe5, // mov %esp, %ebp
286 0x0f, 0x34 // sysenter
287 };
288 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsyscallOffset,
289 vsyscallBlob, sizeof(vsyscallBlob));
290
291 uint8_t vsysexitBlob[] = {
292 0x5d, // pop %ebp
293 0x5a, // pop %edx
294 0x59, // pop %ecx
295 0xc3 // ret
296 };
297 initVirtMem->writeBlob(vsyscallPage.base + vsyscallPage.vsysexitOffset,
298 vsysexitBlob, sizeof(vsysexitBlob));
299
300 for (int i = 0; i < contextIds.size(); i++) {
301 ThreadContext * tc = system->getThreadContext(contextIds[i]);
302
303 SegAttr dataAttr = 0;
304 dataAttr.dpl = 3;
305 dataAttr.unusable = 0;
306 dataAttr.defaultSize = 1;
307 dataAttr.longMode = 0;
308 dataAttr.avl = 0;
309 dataAttr.granularity = 1;
310 dataAttr.present = 1;
311 dataAttr.type = 3;
312 dataAttr.writable = 1;
313 dataAttr.readable = 1;
314 dataAttr.expandDown = 0;
315 dataAttr.system = 1;
316
317 //Initialize the segment registers.
318 for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) {
319 tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0);
320 tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0);
321 tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr);
322 tc->setMiscRegNoEffect(MISCREG_SEG_SEL(seg), 0xB);
323 tc->setMiscRegNoEffect(MISCREG_SEG_LIMIT(seg), (uint32_t)(-1));
324 }
325
326 SegAttr csAttr = 0;
327 csAttr.dpl = 3;
328 csAttr.unusable = 0;
329 csAttr.defaultSize = 1;
330 csAttr.longMode = 0;
331 csAttr.avl = 0;
332 csAttr.granularity = 1;
333 csAttr.present = 1;
334 csAttr.type = 0xa;
335 csAttr.writable = 0;
336 csAttr.readable = 1;
337 csAttr.expandDown = 0;
338 csAttr.system = 1;
339
340 tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr);
341
342 tc->setMiscRegNoEffect(MISCREG_TSG_BASE, _gdtStart);
343 tc->setMiscRegNoEffect(MISCREG_TSG_EFF_BASE, _gdtStart);
344 tc->setMiscRegNoEffect(MISCREG_TSG_LIMIT, _gdtStart + _gdtSize - 1);
345
346 // Set the LDT selector to 0 to deactivate it.
347 tc->setMiscRegNoEffect(MISCREG_TSL, 0);
348
349 Efer efer = 0;
350 efer.sce = 1; // Enable system call extensions.
351 efer.lme = 1; // Enable long mode.
352 efer.lma = 0; // Deactivate long mode.
353 efer.nxe = 1; // Enable nx support.
354 efer.svme = 0; // Disable svm support for now. It isn't implemented.
355 efer.ffxsr = 1; // Turn on fast fxsave and fxrstor.
356 tc->setMiscReg(MISCREG_EFER, efer);
357
358 //Set up the registers that describe the operating mode.
359 CR0 cr0 = 0;
360 cr0.pg = 1; // Turn on paging.
361 cr0.cd = 0; // Don't disable caching.
362 cr0.nw = 0; // This is bit is defined to be ignored.
363 cr0.am = 0; // No alignment checking
364 cr0.wp = 0; // Supervisor mode can write read only pages
365 cr0.ne = 1;
366 cr0.et = 1; // This should always be 1
367 cr0.ts = 0; // We don't do task switching, so causing fp exceptions
368 // would be pointless.
369 cr0.em = 0; // Allow x87 instructions to execute natively.
370 cr0.mp = 1; // This doesn't really matter, but the manual suggests
371 // setting it to one.
372 cr0.pe = 1; // We're definitely in protected mode.
373 tc->setMiscReg(MISCREG_CR0, cr0);
374
375 tc->setMiscReg(MISCREG_MXCSR, 0x1f80);
376 }
377}
378
379template<class IntType>
380void
381X86LiveProcess::argsInit(int pageSize,
382 std::vector<AuxVector<IntType> > extraAuxvs)
383{
384 int intSize = sizeof(IntType);
385
386 typedef AuxVector<IntType> auxv_t;
387 std::vector<auxv_t> auxv = extraAuxvs;
388
389 string filename;
390 if(argv.size() < 1)
391 filename = "";
392 else
393 filename = argv[0];
394
395 //We want 16 byte alignment
396 uint64_t align = 16;
397
398 // load object file into target memory
399 objFile->loadSections(initVirtMem);
400
401 enum X86CpuFeature {
402 X86_OnboardFPU = 1 << 0,
403 X86_VirtualModeExtensions = 1 << 1,
404 X86_DebuggingExtensions = 1 << 2,
405 X86_PageSizeExtensions = 1 << 3,
406
407 X86_TimeStampCounter = 1 << 4,
408 X86_ModelSpecificRegisters = 1 << 5,
409 X86_PhysicalAddressExtensions = 1 << 6,
410 X86_MachineCheckExtensions = 1 << 7,
411
412 X86_CMPXCHG8Instruction = 1 << 8,
413 X86_OnboardAPIC = 1 << 9,
414 X86_SYSENTER_SYSEXIT = 1 << 11,
415
416 X86_MemoryTypeRangeRegisters = 1 << 12,
417 X86_PageGlobalEnable = 1 << 13,
418 X86_MachineCheckArchitecture = 1 << 14,
419 X86_CMOVInstruction = 1 << 15,
420
421 X86_PageAttributeTable = 1 << 16,
422 X86_36BitPSEs = 1 << 17,
423 X86_ProcessorSerialNumber = 1 << 18,
424 X86_CLFLUSHInstruction = 1 << 19,
425
426 X86_DebugTraceStore = 1 << 21,
427 X86_ACPIViaMSR = 1 << 22,
428 X86_MultimediaExtensions = 1 << 23,
429
430 X86_FXSAVE_FXRSTOR = 1 << 24,
431 X86_StreamingSIMDExtensions = 1 << 25,
432 X86_StreamingSIMDExtensions2 = 1 << 26,
433 X86_CPUSelfSnoop = 1 << 27,
434
435 X86_HyperThreading = 1 << 28,
436 X86_AutomaticClockControl = 1 << 29,
437 X86_IA64Processor = 1 << 30
438 };
439
440 //Setup the auxilliary vectors. These will already have endian conversion.
441 //Auxilliary vectors are loaded only for elf formatted executables.
442 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
443 if(elfObject)
444 {
445 uint64_t features =
446 X86_OnboardFPU |
447 X86_VirtualModeExtensions |
448 X86_DebuggingExtensions |
449 X86_PageSizeExtensions |
450 X86_TimeStampCounter |
451 X86_ModelSpecificRegisters |
452 X86_PhysicalAddressExtensions |
453 X86_MachineCheckExtensions |
454 X86_CMPXCHG8Instruction |
455 X86_OnboardAPIC |
456 X86_SYSENTER_SYSEXIT |
457 X86_MemoryTypeRangeRegisters |
458 X86_PageGlobalEnable |
459 X86_MachineCheckArchitecture |
460 X86_CMOVInstruction |
461 X86_PageAttributeTable |
462 X86_36BitPSEs |
463// X86_ProcessorSerialNumber |
464 X86_CLFLUSHInstruction |
465// X86_DebugTraceStore |
466// X86_ACPIViaMSR |
467 X86_MultimediaExtensions |
468 X86_FXSAVE_FXRSTOR |
469 X86_StreamingSIMDExtensions |
470 X86_StreamingSIMDExtensions2 |
471// X86_CPUSelfSnoop |
472// X86_HyperThreading |
473// X86_AutomaticClockControl |
474// X86_IA64Processor |
475 0;
476
477 //Bits which describe the system hardware capabilities
478 //XXX Figure out what these should be
479 auxv.push_back(auxv_t(M5_AT_HWCAP, features));
480 //The system page size
481 auxv.push_back(auxv_t(M5_AT_PAGESZ, X86ISA::VMPageSize));
482 //Frequency at which times() increments
483 //Defined to be 100 in the kernel source.
484 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
485 // For statically linked executables, this is the virtual address of the
486 // program header tables if they appear in the executable image
487 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
488 // This is the size of a program header entry from the elf file.
489 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
490 // This is the number of program headers from the original elf file.
491 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
492 //This is the address of the elf "interpreter", It should be set
493 //to 0 for regular executables. It should be something else
494 //(not sure what) for dynamic libraries.
495 auxv.push_back(auxv_t(M5_AT_BASE, 0));
496
497 //XXX Figure out what this should be.
498 auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
499 //The entry point to the program
500 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
501 //Different user and group IDs
502 auxv.push_back(auxv_t(M5_AT_UID, uid()));
503 auxv.push_back(auxv_t(M5_AT_EUID, euid()));
504 auxv.push_back(auxv_t(M5_AT_GID, gid()));
505 auxv.push_back(auxv_t(M5_AT_EGID, egid()));
506 //Whether to enable "secure mode" in the executable
507 auxv.push_back(auxv_t(M5_AT_SECURE, 0));
508 //The address of 16 "random" bytes.
509 auxv.push_back(auxv_t(M5_AT_RANDOM, 0));
510 //The name of the program
511 auxv.push_back(auxv_t(M5_AT_EXECFN, 0));
512 //The platform string
513 auxv.push_back(auxv_t(M5_AT_PLATFORM, 0));
514 }
515
516 //Figure out how big the initial stack needs to be
517
518 // A sentry NULL void pointer at the top of the stack.
519 int sentry_size = intSize;
520
521 //This is the name of the file which is present on the initial stack
522 //It's purpose is to let the user space linker examine the original file.
523 int file_name_size = filename.size() + 1;
524
525 const int numRandomBytes = 16;
526 int aux_data_size = numRandomBytes;
527
528 string platform = "x86_64";
529 aux_data_size += platform.size() + 1;
530
531 int env_data_size = 0;
532 for (int i = 0; i < envp.size(); ++i) {
533 env_data_size += envp[i].size() + 1;
534 }
535 int arg_data_size = 0;
536 for (int i = 0; i < argv.size(); ++i) {
537 arg_data_size += argv[i].size() + 1;
538 }
539
540 //The info_block needs to be padded so it's size is a multiple of the
541 //alignment mask. Also, it appears that there needs to be at least some
542 //padding, so if the size is already a multiple, we need to increase it
543 //anyway.
544 int base_info_block_size =
545 sentry_size + file_name_size + env_data_size + arg_data_size;
546
547 int info_block_size = roundUp(base_info_block_size, align);
548
549 int info_block_padding = info_block_size - base_info_block_size;
550
551 //Each auxilliary vector is two 8 byte words
552 int aux_array_size = intSize * 2 * (auxv.size() + 1);
553
554 int envp_array_size = intSize * (envp.size() + 1);
555 int argv_array_size = intSize * (argv.size() + 1);
556
557 int argc_size = intSize;
558
559 //Figure out the size of the contents of the actual initial frame
560 int frame_size =
561 aux_array_size +
562 envp_array_size +
563 argv_array_size +
564 argc_size;
565
566 //There needs to be padding after the auxiliary vector data so that the
567 //very bottom of the stack is aligned properly.
568 int partial_size = frame_size + aux_data_size;
569 int aligned_partial_size = roundUp(partial_size, align);
570 int aux_padding = aligned_partial_size - partial_size;
571
572 int space_needed =
573 info_block_size +
574 aux_data_size +
575 aux_padding +
576 frame_size;
577
578 stack_min = stack_base - space_needed;
579 stack_min = roundDown(stack_min, align);
580 stack_size = stack_base - stack_min;
581
582 // map memory
583 pTable->allocate(roundDown(stack_min, pageSize),
584 roundUp(stack_size, pageSize));
585
586 // map out initial stack contents
587 IntType sentry_base = stack_base - sentry_size;
588 IntType file_name_base = sentry_base - file_name_size;
589 IntType env_data_base = file_name_base - env_data_size;
590 IntType arg_data_base = env_data_base - arg_data_size;
591 IntType aux_data_base = arg_data_base - info_block_padding - aux_data_size;
592 IntType auxv_array_base = aux_data_base - aux_array_size - aux_padding;
593 IntType envp_array_base = auxv_array_base - envp_array_size;
594 IntType argv_array_base = envp_array_base - argv_array_size;
595 IntType argc_base = argv_array_base - argc_size;
596
597 DPRINTF(Stack, "The addresses of items on the initial stack:\n");
598 DPRINTF(Stack, "0x%x - file name\n", file_name_base);
599 DPRINTF(Stack, "0x%x - env data\n", env_data_base);
600 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base);
601 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base);
602 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base);
603 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base);
604 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base);
605 DPRINTF(Stack, "0x%x - argc \n", argc_base);
606 DPRINTF(Stack, "0x%x - stack min\n", stack_min);
607
608 // write contents to stack
609
610 // figure out argc
611 IntType argc = argv.size();
612 IntType guestArgc = X86ISA::htog(argc);
613
614 //Write out the sentry void *
615 IntType sentry_NULL = 0;
616 initVirtMem->writeBlob(sentry_base,
617 (uint8_t*)&sentry_NULL, sentry_size);
618
619 //Write the file name
620 initVirtMem->writeString(file_name_base, filename.c_str());
621
622 //Fix up the aux vectors which point to data
623 assert(auxv[auxv.size() - 3].a_type == M5_AT_RANDOM);
624 auxv[auxv.size() - 3].a_val = aux_data_base;
625 assert(auxv[auxv.size() - 2].a_type == M5_AT_EXECFN);
626 auxv[auxv.size() - 2].a_val = argv_array_base;
627 assert(auxv[auxv.size() - 1].a_type == M5_AT_PLATFORM);
628 auxv[auxv.size() - 1].a_val = aux_data_base + numRandomBytes;
629
630 //Copy the aux stuff
631 for(int x = 0; x < auxv.size(); x++)
632 {
633 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
634 (uint8_t*)&(auxv[x].a_type), intSize);
635 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
636 (uint8_t*)&(auxv[x].a_val), intSize);
637 }
638 //Write out the terminating zeroed auxilliary vector
639 const uint64_t zero = 0;
640 initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
641 (uint8_t*)&zero, 2 * intSize);
642
643 initVirtMem->writeString(aux_data_base, platform.c_str());
644
645 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
646 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
647
648 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
649
650 ThreadContext *tc = system->getThreadContext(contextIds[0]);
651 //Set the stack pointer register
652 tc->setIntReg(StackPointerReg, stack_min);
653
654 Addr prog_entry = objFile->entryPoint();
655 // There doesn't need to be any segment base added in since we're dealing
656 // with the flat segmentation model.
657 tc->setPC(prog_entry);
658 tc->setNextPC(prog_entry + sizeof(MachInst));
659
660 //Align the "stack_min" to a page boundary.
661 stack_min = roundDown(stack_min, pageSize);
662
663// num_processes++;
664}
665
666void
667X86_64LiveProcess::argsInit(int intSize, int pageSize)
668{
669 std::vector<AuxVector<uint64_t> > extraAuxvs;
670 extraAuxvs.push_back(AuxVector<uint64_t>(M5_AT_SYSINFO_EHDR,
671 vsyscallPage.base));
672 X86LiveProcess::argsInit<uint64_t>(pageSize, extraAuxvs);
673}
674
675void
676I386LiveProcess::argsInit(int intSize, int pageSize)
677{
678 std::vector<AuxVector<uint32_t> > extraAuxvs;
679 //Tell the binary where the vsyscall part of the vsyscall page is.
680 extraAuxvs.push_back(AuxVector<uint32_t>(M5_AT_SYSINFO,
681 vsyscallPage.base + vsyscallPage.vsyscallOffset));
682 extraAuxvs.push_back(AuxVector<uint32_t>(M5_AT_SYSINFO_EHDR,
683 vsyscallPage.base));
684 X86LiveProcess::argsInit<uint32_t>(pageSize, extraAuxvs);
685}
686
687void
688X86LiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn return_value)
689{
690 tc->setIntReg(INTREG_RAX, return_value.value());
691}
692
693X86ISA::IntReg
694X86_64LiveProcess::getSyscallArg(ThreadContext *tc, int &i)
695{
696 assert(i < NumArgumentRegs);
697 return tc->readIntReg(ArgumentReg[i++]);
698}
699
700void
701X86_64LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val)
702{
703 assert(i < NumArgumentRegs);
704 return tc->setIntReg(ArgumentReg[i], val);
705}
706
707X86ISA::IntReg
708I386LiveProcess::getSyscallArg(ThreadContext *tc, int &i)
709{
710 assert(i < NumArgumentRegs32);
711 return tc->readIntReg(ArgumentReg32[i++]);
712}
713
714X86ISA::IntReg
715I386LiveProcess::getSyscallArg(ThreadContext *tc, int &i, int width)
716{
717 assert(width == 32 || width == 64);
718 assert(i < NumArgumentRegs);
719 uint64_t retVal = tc->readIntReg(ArgumentReg32[i++]) & mask(32);
720 if (width == 64)
721 retVal |= ((uint64_t)tc->readIntReg(ArgumentReg[i++]) << 32);
722 return retVal;
723}
724
725void
726I386LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val)
727{
728 assert(i < NumArgumentRegs);
729 return tc->setIntReg(ArgumentReg[i], val);
730}