1/*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Ali Saidi
30 */
31
32/*
33 * Copyright (c) 2007 The Hewlett-Packard Development Company
34 * All rights reserved.
35 *
36 * Redistribution and use of this software in source and binary forms,
37 * with or without modification, are permitted provided that the
38 * following conditions are met:
39 *
40 * The software must be used only for Non-Commercial Use which means any
41 * use which is NOT directed to receiving any direct monetary
42 * compensation for, or commercial advantage from such use. Illustrative
43 * examples of non-commercial use are academic research, personal study,
44 * teaching, education and corporate research & development.
45 * Illustrative examples of commercial use are distributing products for
46 * commercial advantage and providing services using the software for
47 * commercial advantage.
48 *
49 * If you wish to use this software or functionality therein that may be
50 * covered by patents for commercial use, please contact:
51 * Director of Intellectual Property Licensing
52 * Office of Strategy and Technology
53 * Hewlett-Packard Company
54 * 1501 Page Mill Road
55 * Palo Alto, California 94304
56 *
57 * Redistributions of source code must retain the above copyright notice,
58 * this list of conditions and the following disclaimer. Redistributions
59 * in binary form must reproduce the above copyright notice, this list of
60 * conditions and the following disclaimer in the documentation and/or
61 * other materials provided with the distribution. Neither the name of
62 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
63 * contributors may be used to endorse or promote products derived from
64 * this software without specific prior written permission. No right of
65 * sublicense is granted herewith. Derivatives of the software and
66 * output created using the software may be prepared, but only for
67 * Non-Commercial Uses. Derivatives of the software may be shared with
68 * others provided: (i) the others agree to abide by the list of
69 * conditions herein which includes the Non-Commercial Use restrictions;
70 * and (ii) such Derivatives of the software include the above copyright
71 * notice to acknowledge the contribution from this software where
72 * applicable, this list of conditions and the disclaimer below.
73 *
74 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
75 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
76 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
77 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
78 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
79 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
80 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
81 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
82 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
83 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
84 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
85 *
86 * Authors: Gabe Black
87 */
88
89#include "arch/x86/isa_traits.hh"
90#include "arch/x86/process.hh"
91#include "arch/x86/segmentregs.hh"
92#include "arch/x86/types.hh"
93#include "base/loader/object_file.hh"
94#include "base/loader/elf_object.hh"
95#include "base/misc.hh"
96#include "base/trace.hh"
97#include "cpu/thread_context.hh"
98#include "mem/page_table.hh"
99#include "mem/translating_port.hh"
100#include "sim/process_impl.hh"
101#include "sim/syscall_emul.hh"
102#include "sim/system.hh"
103
104using namespace std;
105using namespace X86ISA;
106
107static const int ReturnValueReg = INTREG_RAX;
108static const int ArgumentReg[] = {
109 INTREG_RDI,
110 INTREG_RSI,
111 INTREG_RDX,
112 //This argument register is r10 for syscalls and rcx for C.
113 INTREG_R10W,
114 //INTREG_RCX,
115 INTREG_R8W,
116 INTREG_R9W
117};
118static const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int);
119static const int ArgumentReg32[] = {
120 INTREG_EBX,
121 INTREG_ECX,
122 INTREG_EDX,
123 INTREG_ESI,
124 INTREG_EDI,
125};
126static const int NumArgumentRegs32 = sizeof(ArgumentReg) / sizeof(const int);
127
128X86LiveProcess::X86LiveProcess(LiveProcessParams * params, ObjectFile *objFile,
129 SyscallDesc *_syscallDescs, int _numSyscallDescs) :
130 LiveProcess(params, objFile), syscallDescs(_syscallDescs),
131 numSyscallDescs(_numSyscallDescs)
132{
133 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
134 brk_point = roundUp(brk_point, VMPageSize);
135}
136
137X86_64LiveProcess::X86_64LiveProcess(LiveProcessParams *params,
138 ObjectFile *objFile, SyscallDesc *_syscallDescs,
139 int _numSyscallDescs) :
140 X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs)
141{
142 // Set up stack. On X86_64 Linux, stack goes from the top of memory
143 // downward, less the hole for the kernel address space plus one page
144 // for undertermined purposes.
145 stack_base = (Addr)0x7FFFFFFFF000ULL;
146
147 // Set pointer for next thread stack. Reserve 8M for main stack.
148 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
149
150 // Set up region for mmaps. This was determined empirically and may not
151 // always be correct.
152 mmap_start = mmap_end = (Addr)0x2aaaaaaab000ULL;
153}
154
155I386LiveProcess::I386LiveProcess(LiveProcessParams *params,
156 ObjectFile *objFile, SyscallDesc *_syscallDescs,
157 int _numSyscallDescs) :
158 X86LiveProcess(params, objFile, _syscallDescs, _numSyscallDescs)
159{
160 stack_base = (Addr)0xffffe000ULL;
161
162 // Set pointer for next thread stack. Reserve 8M for main stack.
163 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
164
165 // Set up region for mmaps. This was determined empirically and may not
166 // always be correct.
167 mmap_start = mmap_end = (Addr)0xf7ffd000ULL;
168}
169
170SyscallDesc*
171X86LiveProcess::getDesc(int callnum)
172{
173 if (callnum < 0 || callnum >= numSyscallDescs)
174 return NULL;
175 return &syscallDescs[callnum];
176}
177
178void
179X86_64LiveProcess::startup()
180{
181 LiveProcess::startup();
182
183 if (checkpointRestored)
184 return;
185
186 argsInit(sizeof(uint64_t), VMPageSize);
187
188 for (int i = 0; i < contextIds.size(); i++) {
189 ThreadContext * tc = system->getThreadContext(contextIds[i]);
190
191 SegAttr dataAttr = 0;
192 dataAttr.writable = 1;
193 dataAttr.readable = 1;
194 dataAttr.expandDown = 0;
195 dataAttr.dpl = 3;
196 dataAttr.defaultSize = 0;
197 dataAttr.longMode = 1;
198
199 //Initialize the segment registers.
200 for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) {
201 tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0);
202 tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0);
203 tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr);
204 }
205
206 SegAttr csAttr = 0;
207 csAttr.writable = 0;
208 csAttr.readable = 1;
209 csAttr.expandDown = 0;
210 csAttr.dpl = 3;
211 csAttr.defaultSize = 0;
212 csAttr.longMode = 1;
213
214 tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr);
215
216 //Set up the registers that describe the operating mode.
217 CR0 cr0 = 0;
218 cr0.pg = 1; // Turn on paging.
219 cr0.cd = 0; // Don't disable caching.
220 cr0.nw = 0; // This is bit is defined to be ignored.
221 cr0.am = 0; // No alignment checking
222 cr0.wp = 0; // Supervisor mode can write read only pages
223 cr0.ne = 1;
224 cr0.et = 1; // This should always be 1
225 cr0.ts = 0; // We don't do task switching, so causing fp exceptions
226 // would be pointless.
227 cr0.em = 0; // Allow x87 instructions to execute natively.
228 cr0.mp = 1; // This doesn't really matter, but the manual suggests
229 // setting it to one.
230 cr0.pe = 1; // We're definitely in protected mode.
231 tc->setMiscReg(MISCREG_CR0, cr0);
232
233 Efer efer = 0;
234 efer.sce = 1; // Enable system call extensions.
235 efer.lme = 1; // Enable long mode.
236 efer.lma = 1; // Activate long mode.
237 efer.nxe = 1; // Enable nx support.
238 efer.svme = 0; // Disable svm support for now. It isn't implemented.
239 efer.ffxsr = 1; // Turn on fast fxsave and fxrstor.
240 tc->setMiscReg(MISCREG_EFER, efer);
241 }
242}
243
244void
245I386LiveProcess::startup()
246{
247 LiveProcess::startup();
248
249 if (checkpointRestored)
250 return;
251
252 argsInit(sizeof(uint32_t), VMPageSize);
253
254 /*
255 * Set up a GDT for this process. The whole GDT wouldn't really be for
256 * this process, but the only parts we care about are.
257 */
258 _gdtStart = stack_base;
259 _gdtSize = VMPageSize;
260 pTable->allocate(_gdtStart, _gdtSize);
261 uint64_t zero = 0;
262 assert(_gdtSize % sizeof(zero) == 0);
263 for (Addr gdtCurrent = _gdtStart;
264 gdtCurrent < _gdtStart + _gdtSize; gdtCurrent += sizeof(zero)) {
265 initVirtMem->write(gdtCurrent, zero);
266 }
267
268 for (int i = 0; i < contextIds.size(); i++) {
269 ThreadContext * tc = system->getThreadContext(contextIds[i]);
270
271 SegAttr dataAttr = 0;
272 dataAttr.writable = 1;
273 dataAttr.readable = 1;
274 dataAttr.expandDown = 0;
275 dataAttr.dpl = 3;
276 dataAttr.defaultSize = 1;
277 dataAttr.longMode = 0;
278
279 //Initialize the segment registers.
280 for(int seg = 0; seg < NUM_SEGMENTREGS; seg++) {
281 tc->setMiscRegNoEffect(MISCREG_SEG_BASE(seg), 0);
282 tc->setMiscRegNoEffect(MISCREG_SEG_EFF_BASE(seg), 0);
283 tc->setMiscRegNoEffect(MISCREG_SEG_ATTR(seg), dataAttr);
284 tc->setMiscRegNoEffect(MISCREG_SEG_SEL(seg), 0xB);
285 tc->setMiscRegNoEffect(MISCREG_SEG_LIMIT(seg), (uint32_t)(-1));
286 }
287
288 SegAttr csAttr = 0;
289 csAttr.writable = 0;
290 csAttr.readable = 1;
291 csAttr.expandDown = 0;
292 csAttr.dpl = 3;
293 csAttr.defaultSize = 1;
294 csAttr.longMode = 0;
295
296 tc->setMiscRegNoEffect(MISCREG_CS_ATTR, csAttr);
297
298 tc->setMiscRegNoEffect(MISCREG_TSG_BASE, _gdtStart);
299 tc->setMiscRegNoEffect(MISCREG_TSG_EFF_BASE, _gdtStart);
300 tc->setMiscRegNoEffect(MISCREG_TSG_LIMIT, _gdtStart + _gdtSize - 1);
301
302 // Set the LDT selector to 0 to deactivate it.
303 tc->setMiscRegNoEffect(MISCREG_TSL, 0);
304
305 //Set up the registers that describe the operating mode.
306 CR0 cr0 = 0;
307 cr0.pg = 1; // Turn on paging.
308 cr0.cd = 0; // Don't disable caching.
309 cr0.nw = 0; // This is bit is defined to be ignored.
310 cr0.am = 0; // No alignment checking
311 cr0.wp = 0; // Supervisor mode can write read only pages
312 cr0.ne = 1;
313 cr0.et = 1; // This should always be 1
314 cr0.ts = 0; // We don't do task switching, so causing fp exceptions
315 // would be pointless.
316 cr0.em = 0; // Allow x87 instructions to execute natively.
317 cr0.mp = 1; // This doesn't really matter, but the manual suggests
318 // setting it to one.
319 cr0.pe = 1; // We're definitely in protected mode.
320 tc->setMiscReg(MISCREG_CR0, cr0);
321
322 Efer efer = 0;
323 efer.sce = 1; // Enable system call extensions.
324 efer.lme = 1; // Enable long mode.
325 efer.lma = 0; // Deactivate long mode.
326 efer.nxe = 1; // Enable nx support.
327 efer.svme = 0; // Disable svm support for now. It isn't implemented.
328 efer.ffxsr = 1; // Turn on fast fxsave and fxrstor.
329 tc->setMiscReg(MISCREG_EFER, efer);
330 }
331}
332
333template<class IntType>
334void
335X86LiveProcess::argsInit(int pageSize)
336{
337 int intSize = sizeof(IntType);
338
339 typedef AuxVector<IntType> auxv_t;
340 std::vector<auxv_t> auxv;
341
342 string filename;
343 if(argv.size() < 1)
344 filename = "";
345 else
346 filename = argv[0];
347
348 //We want 16 byte alignment
349 uint64_t align = 16;
350
351 // load object file into target memory
352 objFile->loadSections(initVirtMem);
353
354 enum X86CpuFeature {
355 X86_OnboardFPU = 1 << 0,
356 X86_VirtualModeExtensions = 1 << 1,
357 X86_DebuggingExtensions = 1 << 2,
358 X86_PageSizeExtensions = 1 << 3,
359
360 X86_TimeStampCounter = 1 << 4,
361 X86_ModelSpecificRegisters = 1 << 5,
362 X86_PhysicalAddressExtensions = 1 << 6,
363 X86_MachineCheckExtensions = 1 << 7,
364
365 X86_CMPXCHG8Instruction = 1 << 8,
366 X86_OnboardAPIC = 1 << 9,
367 X86_SYSENTER_SYSEXIT = 1 << 11,
368
369 X86_MemoryTypeRangeRegisters = 1 << 12,
370 X86_PageGlobalEnable = 1 << 13,
371 X86_MachineCheckArchitecture = 1 << 14,
372 X86_CMOVInstruction = 1 << 15,
373
374 X86_PageAttributeTable = 1 << 16,
375 X86_36BitPSEs = 1 << 17,
376 X86_ProcessorSerialNumber = 1 << 18,
377 X86_CLFLUSHInstruction = 1 << 19,
378
379 X86_DebugTraceStore = 1 << 21,
380 X86_ACPIViaMSR = 1 << 22,
381 X86_MultimediaExtensions = 1 << 23,
382
383 X86_FXSAVE_FXRSTOR = 1 << 24,
384 X86_StreamingSIMDExtensions = 1 << 25,
385 X86_StreamingSIMDExtensions2 = 1 << 26,
386 X86_CPUSelfSnoop = 1 << 27,
387
388 X86_HyperThreading = 1 << 28,
389 X86_AutomaticClockControl = 1 << 29,
390 X86_IA64Processor = 1 << 30
391 };
392
393 //Setup the auxilliary vectors. These will already have endian conversion.
394 //Auxilliary vectors are loaded only for elf formatted executables.
395 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
396 if(elfObject)
397 {
398 uint64_t features =
399 X86_OnboardFPU |
400 X86_VirtualModeExtensions |
401 X86_DebuggingExtensions |
402 X86_PageSizeExtensions |
403 X86_TimeStampCounter |
404 X86_ModelSpecificRegisters |
405 X86_PhysicalAddressExtensions |
406 X86_MachineCheckExtensions |
407 X86_CMPXCHG8Instruction |
408 X86_OnboardAPIC |
409 X86_SYSENTER_SYSEXIT |
410 X86_MemoryTypeRangeRegisters |
411 X86_PageGlobalEnable |
412 X86_MachineCheckArchitecture |
413 X86_CMOVInstruction |
414 X86_PageAttributeTable |
415 X86_36BitPSEs |
416// X86_ProcessorSerialNumber |
417 X86_CLFLUSHInstruction |
418// X86_DebugTraceStore |
419// X86_ACPIViaMSR |
420 X86_MultimediaExtensions |
421 X86_FXSAVE_FXRSTOR |
422 X86_StreamingSIMDExtensions |
423 X86_StreamingSIMDExtensions2 |
424// X86_CPUSelfSnoop |
425// X86_HyperThreading |
426// X86_AutomaticClockControl |
427// X86_IA64Processor |
428 0;
429
430 //Bits which describe the system hardware capabilities
431 //XXX Figure out what these should be
432 auxv.push_back(auxv_t(M5_AT_HWCAP, features));
433 //The system page size
434 auxv.push_back(auxv_t(M5_AT_PAGESZ, X86ISA::VMPageSize));
435 //Frequency at which times() increments
436 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
437 // For statically linked executables, this is the virtual address of the
438 // program header tables if they appear in the executable image
439 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
440 // This is the size of a program header entry from the elf file.
441 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
442 // This is the number of program headers from the original elf file.
443 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
444 //Defined to be 100 in the kernel source.
445 //This is the address of the elf "interpreter", It should be set
446 //to 0 for regular executables. It should be something else
447 //(not sure what) for dynamic libraries.
448 auxv.push_back(auxv_t(M5_AT_BASE, 0));
449
450 //XXX Figure out what this should be.
451 auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
452 //The entry point to the program
453 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
454 //Different user and group IDs
455 auxv.push_back(auxv_t(M5_AT_UID, uid()));
456 auxv.push_back(auxv_t(M5_AT_EUID, euid()));
457 auxv.push_back(auxv_t(M5_AT_GID, gid()));
458 auxv.push_back(auxv_t(M5_AT_EGID, egid()));
459 //Whether to enable "secure mode" in the executable
460 auxv.push_back(auxv_t(M5_AT_SECURE, 0));
461 //The string "x86_64" with unknown meaning
462 auxv.push_back(auxv_t(M5_AT_PLATFORM, 0));
463 }
464
465 //Figure out how big the initial stack needs to be
466
467 // A sentry NULL void pointer at the top of the stack.
468 int sentry_size = intSize;
469
470 //This is the name of the file which is present on the initial stack
471 //It's purpose is to let the user space linker examine the original file.
472 int file_name_size = filename.size() + 1;
473
474 string platform = "x86_64";
475 int aux_data_size = platform.size() + 1;
476
477 int env_data_size = 0;
478 for (int i = 0; i < envp.size(); ++i) {
479 env_data_size += envp[i].size() + 1;
480 }
481 int arg_data_size = 0;
482 for (int i = 0; i < argv.size(); ++i) {
483 arg_data_size += argv[i].size() + 1;
484 }
485
486 //The info_block needs to be padded so it's size is a multiple of the
487 //alignment mask. Also, it appears that there needs to be at least some
488 //padding, so if the size is already a multiple, we need to increase it
489 //anyway.
490 int base_info_block_size =
491 sentry_size + file_name_size + env_data_size + arg_data_size;
492
493 int info_block_size = roundUp(base_info_block_size, align);
494
495 int info_block_padding = info_block_size - base_info_block_size;
496
497 //Each auxilliary vector is two 8 byte words
498 int aux_array_size = intSize * 2 * (auxv.size() + 1);
499
500 int envp_array_size = intSize * (envp.size() + 1);
501 int argv_array_size = intSize * (argv.size() + 1);
502
503 int argc_size = intSize;
504
505 //Figure out the size of the contents of the actual initial frame
506 int frame_size =
507 aux_array_size +
508 envp_array_size +
509 argv_array_size +
510 argc_size;
511
512 //There needs to be padding after the auxiliary vector data so that the
513 //very bottom of the stack is aligned properly.
514 int partial_size = frame_size + aux_data_size;
515 int aligned_partial_size = roundUp(partial_size, align);
516 int aux_padding = aligned_partial_size - partial_size;
517
518 int space_needed =
519 info_block_size +
520 aux_data_size +
521 aux_padding +
522 frame_size;
523
524 stack_min = stack_base - space_needed;
525 stack_min = roundDown(stack_min, align);
526 stack_size = stack_base - stack_min;
527
528 // map memory
529 pTable->allocate(roundDown(stack_min, pageSize),
530 roundUp(stack_size, pageSize));
531
532 // map out initial stack contents
533 IntType sentry_base = stack_base - sentry_size;
534 IntType file_name_base = sentry_base - file_name_size;
535 IntType env_data_base = file_name_base - env_data_size;
536 IntType arg_data_base = env_data_base - arg_data_size;
537 IntType aux_data_base = arg_data_base - info_block_padding - aux_data_size;
538 IntType auxv_array_base = aux_data_base - aux_array_size - aux_padding;
539 IntType envp_array_base = auxv_array_base - envp_array_size;
540 IntType argv_array_base = envp_array_base - argv_array_size;
541 IntType argc_base = argv_array_base - argc_size;
542
543 DPRINTF(Stack, "The addresses of items on the initial stack:\n");
544 DPRINTF(Stack, "0x%x - file name\n", file_name_base);
545 DPRINTF(Stack, "0x%x - env data\n", env_data_base);
546 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base);
547 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base);
548 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base);
549 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base);
550 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base);
551 DPRINTF(Stack, "0x%x - argc \n", argc_base);
552 DPRINTF(Stack, "0x%x - stack min\n", stack_min);
553
554 // write contents to stack
555
556 // figure out argc
557 IntType argc = argv.size();
558 IntType guestArgc = X86ISA::htog(argc);
559
560 //Write out the sentry void *
561 IntType sentry_NULL = 0;
562 initVirtMem->writeBlob(sentry_base,
563 (uint8_t*)&sentry_NULL, sentry_size);
564
565 //Write the file name
566 initVirtMem->writeString(file_name_base, filename.c_str());
567
568 //Fix up the aux vector which points to the "platform" string
569 assert(auxv[auxv.size() - 1].a_type = M5_AT_PLATFORM);
570 auxv[auxv.size() - 1].a_val = aux_data_base;
571
572 //Copy the aux stuff
573 for(int x = 0; x < auxv.size(); x++)
574 {
575 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
576 (uint8_t*)&(auxv[x].a_type), intSize);
577 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
578 (uint8_t*)&(auxv[x].a_val), intSize);
579 }
580 //Write out the terminating zeroed auxilliary vector
581 const uint64_t zero = 0;
582 initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
583 (uint8_t*)&zero, 2 * intSize);
584
585 initVirtMem->writeString(aux_data_base, platform.c_str());
586
587 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
588 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
589
590 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
591
592 ThreadContext *tc = system->getThreadContext(contextIds[0]);
593 //Set the stack pointer register
594 tc->setIntReg(StackPointerReg, stack_min);
595
596 Addr prog_entry = objFile->entryPoint();
597 // There doesn't need to be any segment base added in since we're dealing
598 // with the flat segmentation model.
599 tc->setPC(prog_entry);
600 tc->setNextPC(prog_entry + sizeof(MachInst));
601
602 //Align the "stack_min" to a page boundary.
603 stack_min = roundDown(stack_min, pageSize);
604
605// num_processes++;
606}
607
608void
609X86_64LiveProcess::argsInit(int intSize, int pageSize)
610{
611 X86LiveProcess::argsInit<uint64_t>(pageSize);
612}
613
614void
615I386LiveProcess::argsInit(int intSize, int pageSize)
616{
617 X86LiveProcess::argsInit<uint32_t>(pageSize);
618}
619
620void
621X86LiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn return_value)
622{
623 tc->setIntReg(INTREG_RAX, return_value.value());
624}
625
626X86ISA::IntReg
627X86_64LiveProcess::getSyscallArg(ThreadContext *tc, int i)
628{
629 assert(i < NumArgumentRegs);
630 return tc->readIntReg(ArgumentReg[i]);
631}
632
633void
634X86_64LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val)
635{
636 assert(i < NumArgumentRegs);
637 return tc->setIntReg(ArgumentReg[i], val);
638}
639
640X86ISA::IntReg
641I386LiveProcess::getSyscallArg(ThreadContext *tc, int i)
642{
643 assert(i < NumArgumentRegs32);
644 return tc->readIntReg(ArgumentReg32[i]);
645}
646
647void
648I386LiveProcess::setSyscallArg(ThreadContext *tc, int i, X86ISA::IntReg val)
649{
650 assert(i < NumArgumentRegs);
651 return tc->setIntReg(ArgumentReg[i], val);
652}