pagetable.hh (5124:3d8c50376609) pagetable.hh (5184:8782de2949e5)
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *

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71 struct VAddr
72 {
73 VAddr(Addr a) { panic("not implemented yet."); }
74 };
75
76 struct TlbEntry
77 {
78 // The base of the physical page.
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *

--- 62 unchanged lines hidden (view full) ---

71 struct VAddr
72 {
73 VAddr(Addr a) { panic("not implemented yet."); }
74 };
75
76 struct TlbEntry
77 {
78 // The base of the physical page.
79 Addr pageStart;
79 Addr paddr;
80
81 // The beginning of the virtual page this entry maps.
82 Addr vaddr;
83 // The size of the page this entry represents.
84 Addr size;
85
80 // Read permission is always available, assuming it isn't blocked by
81 // other mechanisms.
86 // Read permission is always available, assuming it isn't blocked by
87 // other mechanisms.
82 bool writeable;
88 bool writable;
83 // Whether this page is accesible without being in supervisor mode.
84 bool user;
85 // Whether to use write through or write back. M5 ignores this and
86 // lets the caches handle the writeback policy.
87 //bool pwt;
88 // Whether the page is cacheable or not.
89 bool uncacheable;
90 // Whether or not to kick this page out on a write to CR3.
91 bool global;
92 // A bit used to form an index into the PAT table.
93 bool patBit;
94 // Whether or not memory on this page can be executed.
95 bool noExec;
96
89 // Whether this page is accesible without being in supervisor mode.
90 bool user;
91 // Whether to use write through or write back. M5 ignores this and
92 // lets the caches handle the writeback policy.
93 //bool pwt;
94 // Whether the page is cacheable or not.
95 bool uncacheable;
96 // Whether or not to kick this page out on a write to CR3.
97 bool global;
98 // A bit used to form an index into the PAT table.
99 bool patBit;
100 // Whether or not memory on this page can be executed.
101 bool noExec;
102
97 // The beginning of the virtual page this entry maps.
98 Addr vaddr;
99 // The size of the page this entry represents.
100 Addr size;
101
103 TlbEntry(Addr asn, Addr _vaddr, Addr _paddr);
102 TlbEntry() {}
104 TlbEntry() {}
103 TlbEntry(Addr paddr) : pageStart(paddr) {}
104
105
106 Addr pageStart()
107 {
108 return paddr;
109 }
110
105 void serialize(std::ostream &os);
106 void unserialize(Checkpoint *cp, const std::string &section);
107 };
108}
109
110#endif
111 void serialize(std::ostream &os);
112 void unserialize(Checkpoint *cp, const std::string &section);
113 };
114}
115
116#endif