mmapped_ipr.hh (9179:666bc9df1e49) mmapped_ipr.hh (9180:ee8d7a51651d)
1/*
2 * Copyright (c) 2007-2008 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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48
49#include "arch/x86/regs/misc.hh"
50#include "cpu/base.hh"
51#include "cpu/thread_context.hh"
52#include "mem/packet.hh"
53
54namespace X86ISA
55{
1/*
2 * Copyright (c) 2007-2008 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 39 unchanged lines hidden (view full) ---

48
49#include "arch/x86/regs/misc.hh"
50#include "cpu/base.hh"
51#include "cpu/thread_context.hh"
52#include "mem/packet.hh"
53
54namespace X86ISA
55{
56 inline Tick
56 inline Cycles
57 handleIprRead(ThreadContext *xc, Packet *pkt)
58 {
59 Addr offset = pkt->getAddr() & mask(3);
60 MiscRegIndex index = (MiscRegIndex)(pkt->getAddr() / sizeof(MiscReg));
61 MiscReg data = htog(xc->readMiscReg(index));
62 // Make sure we don't trot off the end of data.
63 assert(offset + pkt->getSize() <= sizeof(MiscReg));
64 pkt->setData(((uint8_t *)&data) + offset);
57 handleIprRead(ThreadContext *xc, Packet *pkt)
58 {
59 Addr offset = pkt->getAddr() & mask(3);
60 MiscRegIndex index = (MiscRegIndex)(pkt->getAddr() / sizeof(MiscReg));
61 MiscReg data = htog(xc->readMiscReg(index));
62 // Make sure we don't trot off the end of data.
63 assert(offset + pkt->getSize() <= sizeof(MiscReg));
64 pkt->setData(((uint8_t *)&data) + offset);
65 return 1;
65 return Cycles(1);
66 }
67
66 }
67
68 inline Tick
68 inline Cycles
69 handleIprWrite(ThreadContext *xc, Packet *pkt)
70 {
71 Addr offset = pkt->getAddr() & mask(3);
72 MiscRegIndex index = (MiscRegIndex)(pkt->getAddr() / sizeof(MiscReg));
73 MiscReg data;
74 data = htog(xc->readMiscRegNoEffect(index));
75 // Make sure we don't trot off the end of data.
76 assert(offset + pkt->getSize() <= sizeof(MiscReg));
77 pkt->writeData(((uint8_t *)&data) + offset);
78 xc->setMiscReg(index, gtoh(data));
69 handleIprWrite(ThreadContext *xc, Packet *pkt)
70 {
71 Addr offset = pkt->getAddr() & mask(3);
72 MiscRegIndex index = (MiscRegIndex)(pkt->getAddr() / sizeof(MiscReg));
73 MiscReg data;
74 data = htog(xc->readMiscRegNoEffect(index));
75 // Make sure we don't trot off the end of data.
76 assert(offset + pkt->getSize() <= sizeof(MiscReg));
77 pkt->writeData(((uint8_t *)&data) + offset);
78 xc->setMiscReg(index, gtoh(data));
79 return 1;
79 return Cycles(1);
80 }
81}
82
83#endif // __ARCH_X86_MMAPPEDIPR_HH__
80 }
81}
82
83#endif // __ARCH_X86_MMAPPEDIPR_HH__