memhelpers.hh (11328:9512d2e25f14) memhelpers.hh (11608:6319a1125f1c)
1/*
2 * Copyright (c) 2011 Google
3 * Copyright (c) 2015 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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40
41namespace X86ISA
42{
43
44/// Initiate a read from memory in timing mode.
45template <class XC>
46Fault
47initiateMemRead(XC *xc, Trace::InstRecord *traceData, Addr addr,
1/*
2 * Copyright (c) 2011 Google
3 * Copyright (c) 2015 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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40
41namespace X86ISA
42{
43
44/// Initiate a read from memory in timing mode.
45template <class XC>
46Fault
47initiateMemRead(XC *xc, Trace::InstRecord *traceData, Addr addr,
48 unsigned dataSize, unsigned flags)
48 unsigned dataSize, Request::Flags flags)
49{
50 return xc->initiateMemRead(addr, dataSize, flags);
51}
52
53static void
54getMem(PacketPtr pkt, uint64_t &mem, unsigned dataSize,
55 Trace::InstRecord *traceData)
56{

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95 if (traceData)
96 traceData->setData(mem[0]);
97}
98
99
100template <class XC>
101Fault
102readMemAtomic(XC *xc, Trace::InstRecord *traceData, Addr addr, uint64_t &mem,
49{
50 return xc->initiateMemRead(addr, dataSize, flags);
51}
52
53static void
54getMem(PacketPtr pkt, uint64_t &mem, unsigned dataSize,
55 Trace::InstRecord *traceData)
56{

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95 if (traceData)
96 traceData->setData(mem[0]);
97}
98
99
100template <class XC>
101Fault
102readMemAtomic(XC *xc, Trace::InstRecord *traceData, Addr addr, uint64_t &mem,
103 unsigned dataSize, unsigned flags)
103 unsigned dataSize, Request::Flags flags)
104{
105 memset(&mem, 0, sizeof(mem));
106 Fault fault = xc->readMem(addr, (uint8_t *)&mem, dataSize, flags);
107 if (fault == NoFault) {
108 // If LE to LE, this is a nop, if LE to BE, the actual data ends up
109 // in the right place because the LSBs where at the low addresses on
110 // access. This doesn't work for BE guests.
111 mem = gtoh(mem);

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137 traceData->setData(mem[0]);
138 }
139 return fault;
140}
141
142template <class XC>
143Fault
144writeMemTiming(XC *xc, Trace::InstRecord *traceData, uint64_t mem,
104{
105 memset(&mem, 0, sizeof(mem));
106 Fault fault = xc->readMem(addr, (uint8_t *)&mem, dataSize, flags);
107 if (fault == NoFault) {
108 // If LE to LE, this is a nop, if LE to BE, the actual data ends up
109 // in the right place because the LSBs where at the low addresses on
110 // access. This doesn't work for BE guests.
111 mem = gtoh(mem);

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137 traceData->setData(mem[0]);
138 }
139 return fault;
140}
141
142template <class XC>
143Fault
144writeMemTiming(XC *xc, Trace::InstRecord *traceData, uint64_t mem,
145 unsigned dataSize, Addr addr, unsigned flags, uint64_t *res)
145 unsigned dataSize, Addr addr, Request::Flags flags,
146 uint64_t *res)
146{
147 if (traceData) {
148 traceData->setData(mem);
149 }
150 mem = TheISA::htog(mem);
151 return xc->writeMem((uint8_t *)&mem, dataSize, addr, flags, res);
152}
153

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171 mem[i] = htog(mem[i]);
172
173 return xc->writeMem((uint8_t *)&mem, dataSize, addr, flags, res);
174}
175
176template <class XC>
177Fault
178writeMemAtomic(XC *xc, Trace::InstRecord *traceData, uint64_t mem,
147{
148 if (traceData) {
149 traceData->setData(mem);
150 }
151 mem = TheISA::htog(mem);
152 return xc->writeMem((uint8_t *)&mem, dataSize, addr, flags, res);
153}
154

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172 mem[i] = htog(mem[i]);
173
174 return xc->writeMem((uint8_t *)&mem, dataSize, addr, flags, res);
175}
176
177template <class XC>
178Fault
179writeMemAtomic(XC *xc, Trace::InstRecord *traceData, uint64_t mem,
179 unsigned dataSize, Addr addr, unsigned flags, uint64_t *res)
180 unsigned dataSize, Addr addr, Request::Flags flags,
181 uint64_t *res)
180{
181 if (traceData) {
182 traceData->setData(mem);
183 }
184 uint64_t host_mem = TheISA::htog(mem);
185 Fault fault =
186 xc->writeMem((uint8_t *)&host_mem, dataSize, addr, flags, res);
187 if (fault == NoFault && res != NULL) {

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183 if (traceData) {
184 traceData->setData(mem);
185 }
186 uint64_t host_mem = TheISA::htog(mem);
187 Fault fault =
188 xc->writeMem((uint8_t *)&host_mem, dataSize, addr, flags, res);
189 if (fault == NoFault && res != NULL) {

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