memhelpers.hh (11608:6319a1125f1c) | memhelpers.hh (12234:78ece221f9f5) |
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1/* 2 * Copyright (c) 2011 Google 3 * Copyright (c) 2015 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 21 unchanged lines hidden (view full) --- 30 */ 31 32#ifndef __ARCH_X86_MEMHELPERS_HH__ 33#define __ARCH_X86_MEMHELPERS_HH__ 34 35#include <array> 36 37#include "base/types.hh" | 1/* 2 * Copyright (c) 2011 Google 3 * Copyright (c) 2015 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 21 unchanged lines hidden (view full) --- 30 */ 31 32#ifndef __ARCH_X86_MEMHELPERS_HH__ 33#define __ARCH_X86_MEMHELPERS_HH__ 34 35#include <array> 36 37#include "base/types.hh" |
38#include "cpu/exec_context.hh" |
|
38#include "sim/byteswap.hh" 39#include "sim/insttracer.hh" 40 41namespace X86ISA 42{ 43 44/// Initiate a read from memory in timing mode. | 39#include "sim/byteswap.hh" 40#include "sim/insttracer.hh" 41 42namespace X86ISA 43{ 44 45/// Initiate a read from memory in timing mode. |
45template <class XC> 46Fault 47initiateMemRead(XC *xc, Trace::InstRecord *traceData, Addr addr, | 46static Fault 47initiateMemRead(ExecContext *xc, Trace::InstRecord *traceData, Addr addr, |
48 unsigned dataSize, Request::Flags flags) 49{ 50 return xc->initiateMemRead(addr, dataSize, flags); 51} 52 53static void 54getMem(PacketPtr pkt, uint64_t &mem, unsigned dataSize, 55 Trace::InstRecord *traceData) --- 36 unchanged lines hidden (view full) --- 92 93 // traceData record only has space for 64 bits, so we just record 94 // the first qword 95 if (traceData) 96 traceData->setData(mem[0]); 97} 98 99 | 48 unsigned dataSize, Request::Flags flags) 49{ 50 return xc->initiateMemRead(addr, dataSize, flags); 51} 52 53static void 54getMem(PacketPtr pkt, uint64_t &mem, unsigned dataSize, 55 Trace::InstRecord *traceData) --- 36 unchanged lines hidden (view full) --- 92 93 // traceData record only has space for 64 bits, so we just record 94 // the first qword 95 if (traceData) 96 traceData->setData(mem[0]); 97} 98 99 |
100template <class XC> 101Fault 102readMemAtomic(XC *xc, Trace::InstRecord *traceData, Addr addr, uint64_t &mem, 103 unsigned dataSize, Request::Flags flags) | 100static Fault 101readMemAtomic(ExecContext *xc, Trace::InstRecord *traceData, Addr addr, 102 uint64_t &mem, unsigned dataSize, Request::Flags flags) |
104{ 105 memset(&mem, 0, sizeof(mem)); 106 Fault fault = xc->readMem(addr, (uint8_t *)&mem, dataSize, flags); 107 if (fault == NoFault) { 108 // If LE to LE, this is a nop, if LE to BE, the actual data ends up 109 // in the right place because the LSBs where at the low addresses on 110 // access. This doesn't work for BE guests. 111 mem = gtoh(mem); 112 if (traceData) 113 traceData->setData(mem); 114 } 115 return fault; 116} 117 | 103{ 104 memset(&mem, 0, sizeof(mem)); 105 Fault fault = xc->readMem(addr, (uint8_t *)&mem, dataSize, flags); 106 if (fault == NoFault) { 107 // If LE to LE, this is a nop, if LE to BE, the actual data ends up 108 // in the right place because the LSBs where at the low addresses on 109 // access. This doesn't work for BE guests. 110 mem = gtoh(mem); 111 if (traceData) 112 traceData->setData(mem); 113 } 114 return fault; 115} 116 |
118template <class XC, size_t N> | 117template |
119Fault | 118Fault |
120readMemAtomic(XC *xc, Trace::InstRecord *traceData, Addr addr, | 119readMemAtomic(ExecContext *xc, Trace::InstRecord *traceData, Addr addr, |
121 std::array<uint64_t, N> &mem, unsigned dataSize, 122 unsigned flags) 123{ 124 assert(dataSize >= 8); 125 assert((dataSize % 8) == 0); 126 127 Fault fault = xc->readMem(addr, (uint8_t *)&mem, dataSize, flags); 128 --- 5 unchanged lines hidden (view full) --- 134 mem[i] = gtoh(mem[i]); 135 136 if (traceData) 137 traceData->setData(mem[0]); 138 } 139 return fault; 140} 141 | 120 std::array<uint64_t, N> &mem, unsigned dataSize, 121 unsigned flags) 122{ 123 assert(dataSize >= 8); 124 assert((dataSize % 8) == 0); 125 126 Fault fault = xc->readMem(addr, (uint8_t *)&mem, dataSize, flags); 127 --- 5 unchanged lines hidden (view full) --- 133 mem[i] = gtoh(mem[i]); 134 135 if (traceData) 136 traceData->setData(mem[0]); 137 } 138 return fault; 139} 140 |
142template <class XC> 143Fault 144writeMemTiming(XC *xc, Trace::InstRecord *traceData, uint64_t mem, | 141static Fault 142writeMemTiming(ExecContext *xc, Trace::InstRecord *traceData, uint64_t mem, |
145 unsigned dataSize, Addr addr, Request::Flags flags, 146 uint64_t *res) 147{ 148 if (traceData) { 149 traceData->setData(mem); 150 } 151 mem = TheISA::htog(mem); 152 return xc->writeMem((uint8_t *)&mem, dataSize, addr, flags, res); 153} 154 | 143 unsigned dataSize, Addr addr, Request::Flags flags, 144 uint64_t *res) 145{ 146 if (traceData) { 147 traceData->setData(mem); 148 } 149 mem = TheISA::htog(mem); 150 return xc->writeMem((uint8_t *)&mem, dataSize, addr, flags, res); 151} 152 |
155template <class XC, size_t N> | 153template |
156Fault | 154Fault |
157writeMemTiming(XC *xc, Trace::InstRecord *traceData, | 155writeMemTiming(ExecContext *xc, Trace::InstRecord *traceData, |
158 std::array<uint64_t, N> &mem, unsigned dataSize, 159 Addr addr, unsigned flags, uint64_t *res) 160{ 161 assert(dataSize >= 8); 162 assert((dataSize % 8) == 0); 163 164 if (traceData) { 165 traceData->setData(mem[0]); 166 } 167 168 int num_words = dataSize / 8; 169 assert(num_words <= N); 170 171 for (int i = 0; i < num_words; ++i) 172 mem[i] = htog(mem[i]); 173 174 return xc->writeMem((uint8_t *)&mem, dataSize, addr, flags, res); 175} 176 | 156 std::array<uint64_t, N> &mem, unsigned dataSize, 157 Addr addr, unsigned flags, uint64_t *res) 158{ 159 assert(dataSize >= 8); 160 assert((dataSize % 8) == 0); 161 162 if (traceData) { 163 traceData->setData(mem[0]); 164 } 165 166 int num_words = dataSize / 8; 167 assert(num_words <= N); 168 169 for (int i = 0; i < num_words; ++i) 170 mem[i] = htog(mem[i]); 171 172 return xc->writeMem((uint8_t *)&mem, dataSize, addr, flags, res); 173} 174 |
177template <class XC> 178Fault 179writeMemAtomic(XC *xc, Trace::InstRecord *traceData, uint64_t mem, | 175static Fault 176writeMemAtomic(ExecContext *xc, Trace::InstRecord *traceData, uint64_t mem, |
180 unsigned dataSize, Addr addr, Request::Flags flags, 181 uint64_t *res) 182{ 183 if (traceData) { 184 traceData->setData(mem); 185 } 186 uint64_t host_mem = TheISA::htog(mem); 187 Fault fault = 188 xc->writeMem((uint8_t *)&host_mem, dataSize, addr, flags, res); 189 if (fault == NoFault && res != NULL) { 190 *res = gtoh(*res); 191 } 192 return fault; 193} 194 | 177 unsigned dataSize, Addr addr, Request::Flags flags, 178 uint64_t *res) 179{ 180 if (traceData) { 181 traceData->setData(mem); 182 } 183 uint64_t host_mem = TheISA::htog(mem); 184 Fault fault = 185 xc->writeMem((uint8_t *)&host_mem, dataSize, addr, flags, res); 186 if (fault == NoFault && res != NULL) { 187 *res = gtoh(*res); 188 } 189 return fault; 190} 191 |
195template <class XC, size_t N> | 192template |
196Fault | 193Fault |
197writeMemAtomic(XC *xc, Trace::InstRecord *traceData, | 194writeMemAtomic(ExecContext *xc, Trace::InstRecord *traceData, |
198 std::array<uint64_t, N> &mem, unsigned dataSize, 199 Addr addr, unsigned flags, uint64_t *res) 200{ 201 if (traceData) { 202 traceData->setData(mem[0]); 203 } 204 205 int num_words = dataSize / 8; --- 17 unchanged lines hidden --- | 195 std::array<uint64_t, N> &mem, unsigned dataSize, 196 Addr addr, unsigned flags, uint64_t *res) 197{ 198 if (traceData) { 199 traceData->setData(mem[0]); 200 } 201 202 int num_words = dataSize / 8; --- 17 unchanged lines hidden --- |