1/*
2 * Copyright (c) 2011 Google
3 * Copyright (c) 2015 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Gabe Black
30 */
31
32#ifndef __ARCH_X86_MEMHELPERS_HH__
33#define __ARCH_X86_MEMHELPERS_HH__
34
35#include <array>
36
37#include "base/types.hh"
38#include "cpu/exec_context.hh"
39#include "sim/byteswap.hh"
40#include "sim/insttracer.hh"
41
42namespace X86ISA
43{
44
45/// Initiate a read from memory in timing mode.
46static Fault
47initiateMemRead(ExecContext *xc, Trace::InstRecord *traceData, Addr addr,
48 unsigned dataSize, Request::Flags flags)
49{
50 return xc->initiateMemRead(addr, dataSize, flags);
51}
52
53static void
54getMem(PacketPtr pkt, uint64_t &mem, unsigned dataSize,
55 Trace::InstRecord *traceData)
56{
57 switch (dataSize) {
58 case 1:
59 mem = pkt->getLE<uint8_t>();
60 break;
61 case 2:
62 mem = pkt->getLE<uint16_t>();
63 break;
64 case 4:
65 mem = pkt->getLE<uint32_t>();
66 break;
67 case 8:
68 mem = pkt->getLE<uint64_t>();
69 break;
70 default:
71 panic("Unhandled size in getMem.\n");
72 }
73 if (traceData)
74 traceData->setData(mem);
75}
76
77template <typename T, size_t N>
78static void
79getPackedMem(PacketPtr pkt, std::array<uint64_t, N> &mem, unsigned dataSize)
80{
81 std::array<T, N> real_mem = pkt->getLE<std::array<T, N> >();
82 for (int i = 0; i < N; i++)
83 mem[i] = real_mem[i];
84}
85
86template <size_t N>
87static void
88getMem(PacketPtr pkt, std::array<uint64_t, N> &mem, unsigned dataSize,
89 Trace::InstRecord *traceData)
90{
91 switch (dataSize) {
92 case 4:
93 getPackedMem<uint32_t, N>(pkt, mem, dataSize);
94 break;
95 case 8:
96 getPackedMem<uint64_t, N>(pkt, mem, dataSize);
97 break;
98 default:
99 panic("Unhandled element size in getMem.\n");
100 }
101 if (traceData)
102 traceData->setData(mem[0]);
103}
104
105
106static Fault
107readMemAtomic(ExecContext *xc, Trace::InstRecord *traceData, Addr addr,
108 uint64_t &mem, unsigned dataSize, Request::Flags flags)
109{
110 memset(&mem, 0, sizeof(mem));
111 Fault fault = xc->readMem(addr, (uint8_t *)&mem, dataSize, flags);
112 if (fault == NoFault) {
113 // If LE to LE, this is a nop, if LE to BE, the actual data ends up
114 // in the right place because the LSBs where at the low addresses on
115 // access. This doesn't work for BE guests.
116 mem = gtoh(mem);
117 if (traceData)
118 traceData->setData(mem);
119 }
120 return fault;
121}
122
123template <typename T, size_t N>
124static Fault
125readPackedMemAtomic(ExecContext *xc, Addr addr, std::array<uint64_t, N> &mem,
126 unsigned flags)
127{
128 std::array<T, N> real_mem;
129 Fault fault = xc->readMem(addr, (uint8_t *)&real_mem,
130 sizeof(T) * N, flags);
131 if (fault == NoFault) {
132 real_mem = gtoh(real_mem);
133 for (int i = 0; i < N; i++)
134 mem[i] = real_mem[i];
135 }
136 return fault;
137}
138
139template <size_t N>
140static Fault
141readMemAtomic(ExecContext *xc, Trace::InstRecord *traceData, Addr addr,
142 std::array<uint64_t, N> &mem, unsigned dataSize,
143 unsigned flags)
144{
145 Fault fault = NoFault;
146
147 switch (dataSize) {
148 case 4:
149 fault = readPackedMemAtomic<uint32_t, N>(xc, addr, mem, flags);
150 break;
151 case 8:
152 fault = readPackedMemAtomic<uint64_t, N>(xc, addr, mem, flags);
153 break;
154 default:
155 panic("Unhandled element size in readMemAtomic\n");
156 }
157 if (fault == NoFault && traceData)
158 traceData->setData(mem[0]);
159 return fault;
160}
161
162template <typename T, size_t N>
163static Fault
164writePackedMem(ExecContext *xc, std::array<uint64_t, N> &mem, Addr addr,
165 unsigned flags, uint64_t *res)
166{
167 std::array<T, N> real_mem;
168 for (int i = 0; i < N; i++)
169 real_mem[i] = mem[i];
170 real_mem = htog(real_mem);
171 return xc->writeMem((uint8_t *)&real_mem, sizeof(T) * N,
172 addr, flags, res);
173}
174
175static Fault
176writeMemTiming(ExecContext *xc, Trace::InstRecord *traceData, uint64_t mem,
177 unsigned dataSize, Addr addr, Request::Flags flags,
178 uint64_t *res)
179{
180 if (traceData)
181 traceData->setData(mem);
182 mem = TheISA::htog(mem);
183 return xc->writeMem((uint8_t *)&mem, dataSize, addr, flags, res);
184}
185
186template <size_t N>
187static Fault
188writeMemTiming(ExecContext *xc, Trace::InstRecord *traceData,
189 std::array<uint64_t, N> &mem, unsigned dataSize,
190 Addr addr, unsigned flags, uint64_t *res)
191{
192 if (traceData)
193 traceData->setData(mem[0]);
194
195 switch (dataSize) {
196 case 4:
197 return writePackedMem<uint32_t, N>(xc, mem, addr, flags, res);
198 case 8:
199 return writePackedMem<uint64_t, N>(xc, mem, addr, flags, res);
200 default:
201 panic("Unhandled element size in writeMemTiming.\n");
202 }
203}
204
205static Fault
206writeMemAtomic(ExecContext *xc, Trace::InstRecord *traceData, uint64_t mem,
207 unsigned dataSize, Addr addr, Request::Flags flags,
208 uint64_t *res)
209{
210 if (traceData)
211 traceData->setData(mem);
212 uint64_t host_mem = TheISA::htog(mem);
213 Fault fault =
214 xc->writeMem((uint8_t *)&host_mem, dataSize, addr, flags, res);
215 if (fault == NoFault && res)
216 *res = gtoh(*res);
217 return fault;
218}
219
220template <size_t N>
221static Fault
222writeMemAtomic(ExecContext *xc, Trace::InstRecord *traceData,
223 std::array<uint64_t, N> &mem, unsigned dataSize,
224 Addr addr, unsigned flags, uint64_t *res)
225{
226 if (traceData)
227 traceData->setData(mem[0]);
228
229 Fault fault;
230 switch (dataSize) {
231 case 4:
232 fault = writePackedMem<uint32_t, N>(xc, mem, addr, flags, res);
233 break;
234 case 8:
235 fault = writePackedMem<uint64_t, N>(xc, mem, addr, flags, res);
236 break;
237 default:
238 panic("Unhandled element size in writeMemAtomic.\n");
239 }
240
241 if (fault == NoFault && res)
242 *res = gtoh(*res);
243
244 return fault;
245}
246
247}
248
249#endif