1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * All rights reserved. 4 * 5 * Redistribution and use of this software in source and binary forms, 6 * with or without modification, are permitted provided that the 7 * following conditions are met: 8 * --- 45 unchanged lines hidden (view full) --- 54 * 55 * Authors: Gabe Black 56 */ 57 58#ifndef __ARCH_X86_ISATRAITS_HH__ 59#define __ARCH_X86_ISATRAITS_HH__ 60 61#include "arch/x86/intregs.hh" |
62#include "arch/x86/max_inst_regs.hh" |
63#include "arch/x86/types.hh" 64#include "arch/x86/x86_traits.hh" 65#include "sim/host.hh" 66 67class StaticInstPtr; 68 69namespace LittleEndianGuest {} 70 71namespace X86ISA 72{ 73 //This makes sure the little endian version of certain functions 74 //are used. 75 using namespace LittleEndianGuest; |
76 using X86ISAInst::MaxInstSrcRegs; 77 using X86ISAInst::MaxInstDestRegs; |
78 79 // X86 does not have a delay slot 80#define ISA_HAS_DELAY_SLOT 0 81 82 // X86 NOP (XCHG rAX, rAX) 83 //XXX This needs to be set to an intermediate instruction struct 84 //which encodes this instruction 85 --- 33 unchanged lines hidden (view full) --- 119 INTREG_R9W 120 }; 121 const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int); 122 123 // Some OS syscalls use a second register (rdx) to return a second 124 // value 125 const int SyscallPseudoReturnReg = INTREG_RDX; 126 |
127 //4k. This value is not constant on x86. 128 const int LogVMPageSize = 12; 129 const int VMPageSize = (1 << LogVMPageSize); 130 131 const int PageShift = 12; 132 const int PageBytes = 1ULL << PageShift; 133 134 const int BranchPredAddrShiftAmt = 0; 135 136 StaticInstPtr decodeInst(ExtMachInst); 137 138 const Addr LoadAddrMask = ULL(-1); 139}; 140 141#endif // __ARCH_X86_ISATRAITS_HH__ |