| operands.isa (9470:68f7e0bcf4aa) | operands.isa (9471:4193ed60eed7) |
|---|---|
| 1// Copyright (c) 2007-2008 The Hewlett-Packard Development Company 2// All rights reserved. 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license --- 148 unchanged lines hidden (view full) --- 157 158 # These register should needs to be more protected so that later 159 # instructions don't map their indexes with an old value. 160 'nccFlagBits': controlReg('MISCREG_RFLAGS', 65), 161 162 # Registers related to the state of x87 floating point unit. 163 'TOP': controlReg('MISCREG_X87_TOP', 66, ctype='ub'), 164 'FSW': controlReg('MISCREG_FSW', 67, ctype='uw'), | 1// Copyright (c) 2007-2008 The Hewlett-Packard Development Company 2// All rights reserved. 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license --- 148 unchanged lines hidden (view full) --- 157 158 # These register should needs to be more protected so that later 159 # instructions don't map their indexes with an old value. 160 'nccFlagBits': controlReg('MISCREG_RFLAGS', 65), 161 162 # Registers related to the state of x87 floating point unit. 163 'TOP': controlReg('MISCREG_X87_TOP', 66, ctype='ub'), 164 'FSW': controlReg('MISCREG_FSW', 67, ctype='uw'), |
| 165 'FTW': controlReg('MISCREG_FTW', 68, ctype='uw'), |
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| 165 166 # The segment base as used by memory instructions. 167 'SegBase': controlReg('MISCREG_SEG_EFF_BASE(segment)', 70), 168 169 # Operands to get and set registers indexed by the operands of the 170 # original instruction. 171 'ControlDest': squashCR0Reg('MISCREG_CR(dest)', 100), 172 'ControlSrc1': controlReg('MISCREG_CR(src1)', 101), --- 29 unchanged lines hidden --- | 166 167 # The segment base as used by memory instructions. 168 'SegBase': controlReg('MISCREG_SEG_EFF_BASE(segment)', 70), 169 170 # Operands to get and set registers indexed by the operands of the 171 # original instruction. 172 'ControlDest': squashCR0Reg('MISCREG_CR(dest)', 100), 173 'ControlSrc1': controlReg('MISCREG_CR(src1)', 101), --- 29 unchanged lines hidden --- |