specop.isa (7682:37c56be05af0) specop.isa (8610:9bdd52a2214c)
1// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
1// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
2// Copyright (c) 2011 Mark D. Hill and David A. Wood
2// All rights reserved.
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license
9// terms below provided that you ensure that this notice is replicated
10// unmodified and in its entirety in all distributions of the software,
11// modified or unmodified, in source code or in binary form.
12//
13// Redistribution and use in source and binary forms, with or without
14// modification, are permitted provided that the following conditions are
15// met: redistributions of source code must retain the above copyright
16// notice, this list of conditions and the following disclaimer;
17// redistributions in binary form must reproduce the above copyright
18// notice, this list of conditions and the following disclaimer in the
19// documentation and/or other materials provided with the distribution;
20// neither the name of the copyright holders nor the names of its
21// contributors may be used to endorse or promote products derived from
22// this software without specific prior written permission.
23//
24// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35//
36// Authors: Gabe Black
37
38//////////////////////////////////////////////////////////////////////////
39//
40// Fault Microop
41//
42//////////////////////////////////////////////////////////////////////////
43
44output header {{
45 class MicroFaultBase : public X86ISA::X86MicroopBase
46 {
47 protected:
48 Fault fault;
49 uint8_t cc;
50
51 public:
52 MicroFaultBase(ExtMachInst _machInst, const char * instMnem,
53 uint64_t setFlags, Fault _fault, uint8_t _cc);
54
55 std::string generateDisassembly(Addr pc,
56 const SymbolTable *symtab) const;
57 };
58
59 class MicroHalt : public X86ISA::X86MicroopBase
60 {
61 public:
62 MicroHalt(ExtMachInst _machInst, const char * instMnem,
63 uint64_t setFlags) :
64 X86MicroopBase(_machInst, "halt", instMnem,
65 setFlags | (ULL(1) << StaticInst::IsNonSpeculative),
66 No_OpClass)
67 {
68 }
69
70 %(BasicExecDeclare)s
71
72 std::string generateDisassembly(Addr pc,
73 const SymbolTable *symtab) const;
74 };
75}};
76
77def template MicroFaultDeclare {{
78 class %(class_name)s : public %(base_class)s
79 {
80 public:
81 %(class_name)s(ExtMachInst _machInst, const char * instMnem,
82 uint64_t setFlags, Fault _fault, uint8_t _cc);
83
84 %(BasicExecDeclare)s
85 };
86}};
87
88def template MicroFaultExecute {{
89 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
90 Trace::InstRecord *traceData) const
91 {
92 %(op_decl)s;
93 %(op_rd)s;
94 if (%(cond_test)s) {
95 //Return the fault we were constructed with
96 return fault;
97 } else {
98 return NoFault;
99 }
100 }
101}};
102
103output exec {{
104 Fault
105 MicroHalt::execute(%(CPU_exec_context)s *xc,
106 Trace::InstRecord * traceData) const
107 {
108 xc->tcBase()->suspend();
109 return NoFault;
110 }
111}};
112
113output decoder {{
114 inline MicroFaultBase::MicroFaultBase(
115 ExtMachInst machInst, const char * instMnem,
116 uint64_t setFlags, Fault _fault, uint8_t _cc) :
117 X86MicroopBase(machInst, "fault", instMnem, setFlags, No_OpClass),
118 fault(_fault), cc(_cc)
119 {
120 }
121}};
122
123def template MicroFaultConstructor {{
124 inline %(class_name)s::%(class_name)s(
125 ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
126 Fault _fault, uint8_t _cc) :
127 %(base_class)s(machInst, instMnem, setFlags, _fault, _cc)
128 {
129 %(constructor)s;
130 }
131}};
132
133output decoder {{
134 std::string MicroFaultBase::generateDisassembly(Addr pc,
135 const SymbolTable *symtab) const
136 {
137 std::stringstream response;
138
139 printMnemonic(response, instMnem, mnemonic);
140 if(fault)
141 response << fault->name();
142 else
143 response << "No Fault";
144
145 return response.str();
146 }
147
148 std::string MicroHalt::generateDisassembly(Addr pc,
149 const SymbolTable *symtab) const
150 {
151 std::stringstream response;
152
153 printMnemonic(response, instMnem, mnemonic);
154
155 return response.str();
156 }
157}};
158
159let {{
160 class Fault(X86Microop):
161 className = "MicroFault"
162 def __init__(self, fault, flags=None):
163 self.fault = fault
164 if flags:
165 if not isinstance(flags, (list, tuple)):
166 raise Exception, "flags must be a list or tuple of flags"
167 self.cond = " | ".join(flags)
168 self.className += "Flags"
169 else:
170 self.cond = "0"
171
172 def getAllocator(self, microFlags):
173 allocator = '''new %(class_name)s(machInst, macrocodeBlock,
174 %(flags)s, %(fault)s, %(cc)s)''' % {
175 "class_name" : self.className,
176 "flags" : self.microFlagsText(microFlags),
177 "fault" : self.fault,
178 "cc" : self.cond}
179 return allocator
180
181 iop = InstObjParams("fault", "MicroFaultFlags", "MicroFaultBase",
182 {"code": "",
183 "cond_test": "checkCondition(ccFlagBits, cc)"})
184 exec_output = MicroFaultExecute.subst(iop)
185 header_output = MicroFaultDeclare.subst(iop)
186 decoder_output = MicroFaultConstructor.subst(iop)
187 iop = InstObjParams("fault", "MicroFault", "MicroFaultBase",
188 {"code": "",
189 "cond_test": "true"})
190 exec_output += MicroFaultExecute.subst(iop)
191 header_output += MicroFaultDeclare.subst(iop)
192 decoder_output += MicroFaultConstructor.subst(iop)
193 microopClasses["fault"] = Fault
194
195 class Halt(X86Microop):
196 className = "MicroHalt"
197 def __init__(self):
198 pass
199
200 def getAllocator(self, microFlags):
201 return "new MicroHalt(machInst, macrocodeBlock, %s)" % \
202 self.microFlagsText(microFlags)
203
204 microopClasses["halt"] = Halt
205}};
3// All rights reserved.
4//
5// The license below extends only to copyright in the software and shall
6// not be construed as granting a license to any other intellectual
7// property including but not limited to intellectual property relating
8// to a hardware implementation of the functionality of the software
9// licensed hereunder. You may use the software subject to the license
10// terms below provided that you ensure that this notice is replicated
11// unmodified and in its entirety in all distributions of the software,
12// modified or unmodified, in source code or in binary form.
13//
14// Redistribution and use in source and binary forms, with or without
15// modification, are permitted provided that the following conditions are
16// met: redistributions of source code must retain the above copyright
17// notice, this list of conditions and the following disclaimer;
18// redistributions in binary form must reproduce the above copyright
19// notice, this list of conditions and the following disclaimer in the
20// documentation and/or other materials provided with the distribution;
21// neither the name of the copyright holders nor the names of its
22// contributors may be used to endorse or promote products derived from
23// this software without specific prior written permission.
24//
25// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36//
37// Authors: Gabe Black
38
39//////////////////////////////////////////////////////////////////////////
40//
41// Fault Microop
42//
43//////////////////////////////////////////////////////////////////////////
44
45output header {{
46 class MicroFaultBase : public X86ISA::X86MicroopBase
47 {
48 protected:
49 Fault fault;
50 uint8_t cc;
51
52 public:
53 MicroFaultBase(ExtMachInst _machInst, const char * instMnem,
54 uint64_t setFlags, Fault _fault, uint8_t _cc);
55
56 std::string generateDisassembly(Addr pc,
57 const SymbolTable *symtab) const;
58 };
59
60 class MicroHalt : public X86ISA::X86MicroopBase
61 {
62 public:
63 MicroHalt(ExtMachInst _machInst, const char * instMnem,
64 uint64_t setFlags) :
65 X86MicroopBase(_machInst, "halt", instMnem,
66 setFlags | (ULL(1) << StaticInst::IsNonSpeculative),
67 No_OpClass)
68 {
69 }
70
71 %(BasicExecDeclare)s
72
73 std::string generateDisassembly(Addr pc,
74 const SymbolTable *symtab) const;
75 };
76}};
77
78def template MicroFaultDeclare {{
79 class %(class_name)s : public %(base_class)s
80 {
81 public:
82 %(class_name)s(ExtMachInst _machInst, const char * instMnem,
83 uint64_t setFlags, Fault _fault, uint8_t _cc);
84
85 %(BasicExecDeclare)s
86 };
87}};
88
89def template MicroFaultExecute {{
90 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
91 Trace::InstRecord *traceData) const
92 {
93 %(op_decl)s;
94 %(op_rd)s;
95 if (%(cond_test)s) {
96 //Return the fault we were constructed with
97 return fault;
98 } else {
99 return NoFault;
100 }
101 }
102}};
103
104output exec {{
105 Fault
106 MicroHalt::execute(%(CPU_exec_context)s *xc,
107 Trace::InstRecord * traceData) const
108 {
109 xc->tcBase()->suspend();
110 return NoFault;
111 }
112}};
113
114output decoder {{
115 inline MicroFaultBase::MicroFaultBase(
116 ExtMachInst machInst, const char * instMnem,
117 uint64_t setFlags, Fault _fault, uint8_t _cc) :
118 X86MicroopBase(machInst, "fault", instMnem, setFlags, No_OpClass),
119 fault(_fault), cc(_cc)
120 {
121 }
122}};
123
124def template MicroFaultConstructor {{
125 inline %(class_name)s::%(class_name)s(
126 ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
127 Fault _fault, uint8_t _cc) :
128 %(base_class)s(machInst, instMnem, setFlags, _fault, _cc)
129 {
130 %(constructor)s;
131 }
132}};
133
134output decoder {{
135 std::string MicroFaultBase::generateDisassembly(Addr pc,
136 const SymbolTable *symtab) const
137 {
138 std::stringstream response;
139
140 printMnemonic(response, instMnem, mnemonic);
141 if(fault)
142 response << fault->name();
143 else
144 response << "No Fault";
145
146 return response.str();
147 }
148
149 std::string MicroHalt::generateDisassembly(Addr pc,
150 const SymbolTable *symtab) const
151 {
152 std::stringstream response;
153
154 printMnemonic(response, instMnem, mnemonic);
155
156 return response.str();
157 }
158}};
159
160let {{
161 class Fault(X86Microop):
162 className = "MicroFault"
163 def __init__(self, fault, flags=None):
164 self.fault = fault
165 if flags:
166 if not isinstance(flags, (list, tuple)):
167 raise Exception, "flags must be a list or tuple of flags"
168 self.cond = " | ".join(flags)
169 self.className += "Flags"
170 else:
171 self.cond = "0"
172
173 def getAllocator(self, microFlags):
174 allocator = '''new %(class_name)s(machInst, macrocodeBlock,
175 %(flags)s, %(fault)s, %(cc)s)''' % {
176 "class_name" : self.className,
177 "flags" : self.microFlagsText(microFlags),
178 "fault" : self.fault,
179 "cc" : self.cond}
180 return allocator
181
182 iop = InstObjParams("fault", "MicroFaultFlags", "MicroFaultBase",
183 {"code": "",
184 "cond_test": "checkCondition(ccFlagBits, cc)"})
185 exec_output = MicroFaultExecute.subst(iop)
186 header_output = MicroFaultDeclare.subst(iop)
187 decoder_output = MicroFaultConstructor.subst(iop)
188 iop = InstObjParams("fault", "MicroFault", "MicroFaultBase",
189 {"code": "",
190 "cond_test": "true"})
191 exec_output += MicroFaultExecute.subst(iop)
192 header_output += MicroFaultDeclare.subst(iop)
193 decoder_output += MicroFaultConstructor.subst(iop)
194 microopClasses["fault"] = Fault
195
196 class Halt(X86Microop):
197 className = "MicroHalt"
198 def __init__(self):
199 pass
200
201 def getAllocator(self, microFlags):
202 return "new MicroHalt(machInst, macrocodeBlock, %s)" % \
203 self.microFlagsText(microFlags)
204
205 microopClasses["halt"] = Halt
206}};
207
208def template MicroFenceOpDeclare {{
209 class %(class_name)s : public X86ISA::X86MicroopBase
210 {
211 public:
212 %(class_name)s(ExtMachInst _machInst,
213 const char * instMnem,
214 uint64_t setFlags);
215
216 %(BasicExecDeclare)s
217 };
218}};
219
220def template MicroFenceOpConstructor {{
221 inline %(class_name)s::%(class_name)s(
222 ExtMachInst machInst, const char * instMnem, uint64_t setFlags) :
223 %(base_class)s(machInst, "%(mnemonic)s", instMnem,
224 setFlags, %(op_class)s)
225 {
226 %(constructor)s;
227 }
228}};
229
230let {{
231 class MfenceOp(X86Microop):
232 def __init__(self):
233 self.className = "Mfence"
234 self.mnemonic = "mfence"
235 self.instFlags = "| (1ULL << StaticInst::IsMemBarrier)"
236
237 def getAllocator(self, microFlags):
238 allocString = '''
239 (StaticInstPtr)(new %(class_name)s(machInst,
240 macrocodeBlock, %(flags)s))
241 '''
242 allocator = allocString % {
243 "class_name" : self.className,
244 "mnemonic" : self.mnemonic,
245 "flags" : self.microFlagsText(microFlags) + self.instFlags}
246 return allocator
247
248 microopClasses["mfence"] = MfenceOp
249}};
250
251let {{
252 # Build up the all register version of this micro op
253 iop = InstObjParams("mfence", "Mfence", 'X86MicroopBase',
254 {"code" : ""})
255 header_output += MicroFenceOpDeclare.subst(iop)
256 decoder_output += MicroFenceOpConstructor.subst(iop)
257 exec_output += BasicExecute.subst(iop)
258}};