1// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license
9// terms below provided that you ensure that this notice is replicated
10// unmodified and in its entirety in all distributions of the software,
11// modified or unmodified, in source code or in binary form.
12//
13// Redistribution and use in source and binary forms, with or without
14// modification, are permitted provided that the following conditions are
15// met: redistributions of source code must retain the above copyright
16// notice, this list of conditions and the following disclaimer;
17// redistributions in binary form must reproduce the above copyright
18// notice, this list of conditions and the following disclaimer in the
19// documentation and/or other materials provided with the distribution;
20// neither the name of the copyright holders nor the names of its
21// contributors may be used to endorse or promote products derived from
22// this software without specific prior written permission.
23//
24// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35//
36// Authors: Gabe Black
37
38//////////////////////////////////////////////////////////////////////////
39//
40// Fault Microop
41//
42//////////////////////////////////////////////////////////////////////////
43
44output header {{
45 class MicroFaultBase : public X86ISA::X86MicroopBase
46 {
47 protected:
48 Fault fault;
49 uint8_t cc;
50
51 public:
52 MicroFaultBase(ExtMachInst _machInst, const char * instMnem,
53 uint64_t setFlags, Fault _fault, uint8_t _cc);
54
| 1// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license
9// terms below provided that you ensure that this notice is replicated
10// unmodified and in its entirety in all distributions of the software,
11// modified or unmodified, in source code or in binary form.
12//
13// Redistribution and use in source and binary forms, with or without
14// modification, are permitted provided that the following conditions are
15// met: redistributions of source code must retain the above copyright
16// notice, this list of conditions and the following disclaimer;
17// redistributions in binary form must reproduce the above copyright
18// notice, this list of conditions and the following disclaimer in the
19// documentation and/or other materials provided with the distribution;
20// neither the name of the copyright holders nor the names of its
21// contributors may be used to endorse or promote products derived from
22// this software without specific prior written permission.
23//
24// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35//
36// Authors: Gabe Black
37
38//////////////////////////////////////////////////////////////////////////
39//
40// Fault Microop
41//
42//////////////////////////////////////////////////////////////////////////
43
44output header {{
45 class MicroFaultBase : public X86ISA::X86MicroopBase
46 {
47 protected:
48 Fault fault;
49 uint8_t cc;
50
51 public:
52 MicroFaultBase(ExtMachInst _machInst, const char * instMnem,
53 uint64_t setFlags, Fault _fault, uint8_t _cc);
54
|
55 MicroFaultBase(ExtMachInst _machInst, const char * instMnem,
56 Fault _fault, uint8_t _cc);
57
| |
58 std::string generateDisassembly(Addr pc,
59 const SymbolTable *symtab) const;
60 };
61
62 class MicroHalt : public X86ISA::X86MicroopBase
63 {
64 public:
65 MicroHalt(ExtMachInst _machInst, const char * instMnem,
66 uint64_t setFlags) :
67 X86MicroopBase(_machInst, "halt", instMnem, setFlags, No_OpClass)
68 {
69 }
70
| 55 std::string generateDisassembly(Addr pc,
56 const SymbolTable *symtab) const;
57 };
58
59 class MicroHalt : public X86ISA::X86MicroopBase
60 {
61 public:
62 MicroHalt(ExtMachInst _machInst, const char * instMnem,
63 uint64_t setFlags) :
64 X86MicroopBase(_machInst, "halt", instMnem, setFlags, No_OpClass)
65 {
66 }
67
|
71 MicroHalt(ExtMachInst _machInst, const char * instMnem) :
72 X86MicroopBase(_machInst, "halt", instMnem, 0, No_OpClass)
73 {
74 }
75
| |
76 %(BasicExecDeclare)s
77
78 std::string generateDisassembly(Addr pc,
79 const SymbolTable *symtab) const;
80 };
81}};
82
83def template MicroFaultDeclare {{
84 class %(class_name)s : public %(base_class)s
85 {
| 68 %(BasicExecDeclare)s
69
70 std::string generateDisassembly(Addr pc,
71 const SymbolTable *symtab) const;
72 };
73}};
74
75def template MicroFaultDeclare {{
76 class %(class_name)s : public %(base_class)s
77 {
|
86 private:
87 void buildMe();
| |
88 public:
89 %(class_name)s(ExtMachInst _machInst, const char * instMnem,
90 uint64_t setFlags, Fault _fault, uint8_t _cc);
91
| 78 public:
79 %(class_name)s(ExtMachInst _machInst, const char * instMnem,
80 uint64_t setFlags, Fault _fault, uint8_t _cc);
81
|
92 %(class_name)s(ExtMachInst _machInst, const char * instMnem,
93 Fault _fault, uint8_t _cc);
94
| |
95 %(BasicExecDeclare)s
96 };
97}};
98
99def template MicroFaultExecute {{
100 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
101 Trace::InstRecord *traceData) const
102 {
103 %(op_decl)s;
104 %(op_rd)s;
105 if (%(cond_test)s) {
106 //Return the fault we were constructed with
107 return fault;
108 } else {
109 return NoFault;
110 }
111 }
112}};
113
114output exec {{
115 Fault
116 MicroHalt::execute(%(CPU_exec_context)s *xc,
117 Trace::InstRecord * traceData) const
118 {
119 xc->tcBase()->suspend();
120 return NoFault;
121 }
122}};
123
124output decoder {{
125 inline MicroFaultBase::MicroFaultBase(
126 ExtMachInst machInst, const char * instMnem,
| 82 %(BasicExecDeclare)s
83 };
84}};
85
86def template MicroFaultExecute {{
87 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
88 Trace::InstRecord *traceData) const
89 {
90 %(op_decl)s;
91 %(op_rd)s;
92 if (%(cond_test)s) {
93 //Return the fault we were constructed with
94 return fault;
95 } else {
96 return NoFault;
97 }
98 }
99}};
100
101output exec {{
102 Fault
103 MicroHalt::execute(%(CPU_exec_context)s *xc,
104 Trace::InstRecord * traceData) const
105 {
106 xc->tcBase()->suspend();
107 return NoFault;
108 }
109}};
110
111output decoder {{
112 inline MicroFaultBase::MicroFaultBase(
113 ExtMachInst machInst, const char * instMnem,
|
127 Fault _fault, uint8_t _cc) :
128 X86MicroopBase(machInst, "fault", instMnem, 0, No_OpClass),
129 fault(_fault), cc(_cc)
130 {
131 }
132
133 inline MicroFaultBase::MicroFaultBase(
134 ExtMachInst machInst, const char * instMnem,
| |
135 uint64_t setFlags, Fault _fault, uint8_t _cc) :
136 X86MicroopBase(machInst, "fault", instMnem, setFlags, No_OpClass),
137 fault(_fault), cc(_cc)
138 {
139 }
140}};
141
142def template MicroFaultConstructor {{
| 114 uint64_t setFlags, Fault _fault, uint8_t _cc) :
115 X86MicroopBase(machInst, "fault", instMnem, setFlags, No_OpClass),
116 fault(_fault), cc(_cc)
117 {
118 }
119}};
120
121def template MicroFaultConstructor {{
|
143
144 inline void %(class_name)s::buildMe()
145 {
146 %(constructor)s;
147 }
148
| |
149 inline %(class_name)s::%(class_name)s(
| 122 inline %(class_name)s::%(class_name)s(
|
150 ExtMachInst machInst, const char * instMnem,
151 Fault _fault, uint8_t _cc) :
152 %(base_class)s(machInst, instMnem, _fault, _cc)
153 {
154 buildMe();
155 }
156
157 inline %(class_name)s::%(class_name)s(
| |
158 ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
159 Fault _fault, uint8_t _cc) :
160 %(base_class)s(machInst, instMnem, setFlags, _fault, _cc)
161 {
| 123 ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
124 Fault _fault, uint8_t _cc) :
125 %(base_class)s(machInst, instMnem, setFlags, _fault, _cc)
126 {
|
162 buildMe();
| 127 %(constructor)s;
|
163 }
164}};
165
166output decoder {{
167 std::string MicroFaultBase::generateDisassembly(Addr pc,
168 const SymbolTable *symtab) const
169 {
170 std::stringstream response;
171
172 printMnemonic(response, instMnem, mnemonic);
173 if(fault)
174 response << fault->name();
175 else
176 response << "No Fault";
177
178 return response.str();
179 }
180
181 std::string MicroHalt::generateDisassembly(Addr pc,
182 const SymbolTable *symtab) const
183 {
184 std::stringstream response;
185
186 printMnemonic(response, instMnem, mnemonic);
187
188 return response.str();
189 }
190}};
191
192let {{
193 class Fault(X86Microop):
194 className = "MicroFault"
195 def __init__(self, fault, flags=None):
196 self.fault = fault
197 if flags:
198 if not isinstance(flags, (list, tuple)):
199 raise Exception, "flags must be a list or tuple of flags"
200 self.cond = " | ".join(flags)
201 self.className += "Flags"
202 else:
203 self.cond = "0"
204
205 def getAllocator(self, microFlags):
206 allocator = '''new %(class_name)s(machInst, macrocodeBlock,
207 %(flags)s, %(fault)s, %(cc)s)''' % {
208 "class_name" : self.className,
209 "flags" : self.microFlagsText(microFlags),
210 "fault" : self.fault,
211 "cc" : self.cond}
212 return allocator
213
214 iop = InstObjParams("fault", "MicroFaultFlags", "MicroFaultBase",
215 {"code": "",
216 "cond_test": "checkCondition(ccFlagBits, cc)"})
217 exec_output = MicroFaultExecute.subst(iop)
218 header_output = MicroFaultDeclare.subst(iop)
219 decoder_output = MicroFaultConstructor.subst(iop)
220 iop = InstObjParams("fault", "MicroFault", "MicroFaultBase",
221 {"code": "",
222 "cond_test": "true"})
223 exec_output += MicroFaultExecute.subst(iop)
224 header_output += MicroFaultDeclare.subst(iop)
225 decoder_output += MicroFaultConstructor.subst(iop)
226 microopClasses["fault"] = Fault
227
228 class Halt(X86Microop):
229 className = "MicroHalt"
230 def __init__(self):
231 pass
232
233 def getAllocator(self, microFlags):
234 return "new MicroHalt(machInst, macrocodeBlock, %s)" % \
235 self.microFlagsText(microFlags)
236
237 microopClasses["halt"] = Halt
238}};
| 128 }
129}};
130
131output decoder {{
132 std::string MicroFaultBase::generateDisassembly(Addr pc,
133 const SymbolTable *symtab) const
134 {
135 std::stringstream response;
136
137 printMnemonic(response, instMnem, mnemonic);
138 if(fault)
139 response << fault->name();
140 else
141 response << "No Fault";
142
143 return response.str();
144 }
145
146 std::string MicroHalt::generateDisassembly(Addr pc,
147 const SymbolTable *symtab) const
148 {
149 std::stringstream response;
150
151 printMnemonic(response, instMnem, mnemonic);
152
153 return response.str();
154 }
155}};
156
157let {{
158 class Fault(X86Microop):
159 className = "MicroFault"
160 def __init__(self, fault, flags=None):
161 self.fault = fault
162 if flags:
163 if not isinstance(flags, (list, tuple)):
164 raise Exception, "flags must be a list or tuple of flags"
165 self.cond = " | ".join(flags)
166 self.className += "Flags"
167 else:
168 self.cond = "0"
169
170 def getAllocator(self, microFlags):
171 allocator = '''new %(class_name)s(machInst, macrocodeBlock,
172 %(flags)s, %(fault)s, %(cc)s)''' % {
173 "class_name" : self.className,
174 "flags" : self.microFlagsText(microFlags),
175 "fault" : self.fault,
176 "cc" : self.cond}
177 return allocator
178
179 iop = InstObjParams("fault", "MicroFaultFlags", "MicroFaultBase",
180 {"code": "",
181 "cond_test": "checkCondition(ccFlagBits, cc)"})
182 exec_output = MicroFaultExecute.subst(iop)
183 header_output = MicroFaultDeclare.subst(iop)
184 decoder_output = MicroFaultConstructor.subst(iop)
185 iop = InstObjParams("fault", "MicroFault", "MicroFaultBase",
186 {"code": "",
187 "cond_test": "true"})
188 exec_output += MicroFaultExecute.subst(iop)
189 header_output += MicroFaultDeclare.subst(iop)
190 decoder_output += MicroFaultConstructor.subst(iop)
191 microopClasses["fault"] = Fault
192
193 class Halt(X86Microop):
194 className = "MicroHalt"
195 def __init__(self):
196 pass
197
198 def getAllocator(self, microFlags):
199 return "new MicroHalt(machInst, macrocodeBlock, %s)" % \
200 self.microFlagsText(microFlags)
201
202 microopClasses["halt"] = Halt
203}};
|