seqop.isa (7720:65d338a8dba4) | seqop.isa (7789:f455790bcd47) |
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1// Copyright (c) 2008 The Hewlett-Packard Development Company 2// All rights reserved. 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license --- 155 unchanged lines hidden (view full) --- 164 def getAllocator(self, microFlags): 165 if not "IsLastMicroop" in microFlags: 166 microFlags.append("IsLastMicroop") 167 if "IsDelayedCommit" in microFlags: 168 microFlags.remove("IsDelayedCommit") 169 return super(Eret, self).getAllocator(microFlags) 170 171 iop = InstObjParams("br", "MicroBranchFlags", "SeqOpBase", | 1// Copyright (c) 2008 The Hewlett-Packard Development Company 2// All rights reserved. 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license --- 155 unchanged lines hidden (view full) --- 164 def getAllocator(self, microFlags): 165 if not "IsLastMicroop" in microFlags: 166 microFlags.append("IsLastMicroop") 167 if "IsDelayedCommit" in microFlags: 168 microFlags.remove("IsDelayedCommit") 169 return super(Eret, self).getAllocator(microFlags) 170 171 iop = InstObjParams("br", "MicroBranchFlags", "SeqOpBase", |
172 {"code": ''' 173 X86ISA::PCState pc = PCS; 174 pc.nupc(target); 175 PCS = pc; 176 ''', 177 "else_code": "PCS = PCS", | 172 {"code": "nuIP = target;", 173 "else_code": "nuIP = nuIP;", |
178 "cond_test": "checkCondition(ccFlagBits, cc)"}) 179 exec_output += SeqOpExecute.subst(iop) 180 header_output += SeqOpDeclare.subst(iop) 181 decoder_output += SeqOpConstructor.subst(iop) 182 iop = InstObjParams("br", "MicroBranch", "SeqOpBase", | 174 "cond_test": "checkCondition(ccFlagBits, cc)"}) 175 exec_output += SeqOpExecute.subst(iop) 176 header_output += SeqOpDeclare.subst(iop) 177 decoder_output += SeqOpConstructor.subst(iop) 178 iop = InstObjParams("br", "MicroBranch", "SeqOpBase", |
183 {"code": ''' 184 X86ISA::PCState pc = PCS; 185 pc.nupc(target); 186 PCS = pc; 187 ''', 188 "else_code": "PCS = PCS", | 179 {"code": "nuIP = target;", 180 "else_code": "nuIP = nuIP;", |
189 "cond_test": "true"}) 190 exec_output += SeqOpExecute.subst(iop) 191 header_output += SeqOpDeclare.subst(iop) 192 decoder_output += SeqOpConstructor.subst(iop) 193 microopClasses["br"] = Br 194 195 iop = InstObjParams("eret", "EretFlags", "SeqOpBase", 196 {"code": "", "else_code": "", --- 12 unchanged lines hidden --- | 181 "cond_test": "true"}) 182 exec_output += SeqOpExecute.subst(iop) 183 header_output += SeqOpDeclare.subst(iop) 184 decoder_output += SeqOpConstructor.subst(iop) 185 microopClasses["br"] = Br 186 187 iop = InstObjParams("eret", "EretFlags", "SeqOpBase", 188 {"code": "", "else_code": "", --- 12 unchanged lines hidden --- |