regop.isa (5291:5d38610cff05) regop.isa (5294:7222bdaed33b)
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// Redistribution and use of this software in source and binary forms,
5// with or without modification, are permitted provided that the
6// following conditions are met:
7//
8// The software must be used only for Non-Commercial Use which means any

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932 }
933 default:
934 panic("Unrecognized control register %d.\\n", dest);
935 }
936 ControlDest = newVal;
937 }
938 '''
939
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// Redistribution and use of this software in source and binary forms,
5// with or without modification, are permitted provided that the
6// following conditions are met:
7//
8// The software must be used only for Non-Commercial Use which means any

--- 923 unchanged lines hidden (view full) ---

932 }
933 default:
934 panic("Unrecognized control register %d.\\n", dest);
935 }
936 ControlDest = newVal;
937 }
938 '''
939
940 class Wrbase(RegOp):
940 # Microops for manipulating segmentation registers
941 class SegOp(RegOp):
942 abstract = True
941 def __init__(self, dest, src1, flags=None, dataSize="env.dataSize"):
943 def __init__(self, dest, src1, flags=None, dataSize="env.dataSize"):
942 super(Wrbase, self).__init__(dest, \
944 super(SegOp, self).__init__(dest, \
943 src1, "NUM_INTREGS", flags, dataSize)
945 src1, "NUM_INTREGS", flags, dataSize)
946
947 class Wrbase(SegOp):
944 code = '''
948 code = '''
945 SysSegBaseDest = psrc1;
949 SegBaseDest = psrc1;
946 '''
947
950 '''
951
948 class Wrlimit(RegOp):
949 def __init__(self, dest, src1, flags=None, dataSize="env.dataSize"):
950 super(Wrlimit, self).__init__(dest, \
951 src1, "NUM_INTREGS", flags, dataSize)
952 class Wrlimit(SegOp):
952 code = '''
953 code = '''
953 SysSegLimitDest = psrc1;
954 SegLimitDest = psrc1;
954 '''
955 '''
956
957 class Wrsel(SegOp):
958 code = '''
959 SegSelDest = psrc1;
960 '''
961
962 class Rdbase(SegOp):
963 code = '''
964 DestReg = SegBaseDest;
965 '''
966
967 class Rdlimit(SegOp):
968 code = '''
969 DestReg = SegLimitSrc1;
970 '''
971
972 class Rdsel(SegOp):
973 code = '''
974 DestReg = SegSelSrc1;
975 '''
976
977 class Chks(SegOp):
978 code = '''
979 // The selector is in source 1.
980 SegSelector selector = psrc1;
981
982 // Compute the address of the descriptor and set DestReg to it.
983 if (selector.ti) {
984 // A descriptor in the LDT
985 Addr target = (selector.esi << 3) + LDTRBase;
986 if (!LDTRSel || (selector.esi << 3) + dataSize > LDTRLimit)
987 fault = new GeneralProtection(selector & mask(16));
988 DestReg = target;
989 } else {
990 // A descriptor in the GDT
991 Addr target = (selector.esi << 3) + GDTRBase;
992 if ((selector.esi << 3) + dataSize > GDTRLimit)
993 fault = new GeneralProtection(selector & mask(16));
994 DestReg = target;
995 }
996 '''
997 flag_code = '''
998 // Check for a NULL selector and set ZF,EZF appropriately.
999 ccFlagBits = ccFlagBits & ~(ext & (ZFBit | EZFBit));
1000 if (!selector.esi && !selector.ti)
1001 ccFlagBits = ccFlagBits | (ext & (ZFBit | EZFBit));
1002 '''
1003
1004 class Wrdh(RegOp):
1005 code = '''
1006
1007 '''
1008
1009 class Wrdl(RegOp):
1010 code = '''
1011 SegDescriptor desc = SrcReg1;
1012 SegAttr attr = 0;
1013 Addr base = 0, limit = 0;
1014 attr.dpl = desc.dpl;
1015 attr.defaultSize = desc.d;
1016 if (!desc.p)
1017 panic("Segment not present.\\n");
1018 if (!desc.s)
1019 panic("System segment encountered.\\n");
1020 if (desc.type.codeOrData) {
1021 panic("Code segment encountered with c = %d, r = %d, a = %d.\\n",
1022 desc.type.c, desc.type.r, desc.type.a);
1023 } else {
1024 attr.expandDown = desc.type.e;
1025 attr.readable = 1;
1026 attr.writable = desc.type.w;
1027 base = desc.baseLow | (desc.baseHigh << 24);
1028 limit = desc.limitLow | (desc.limitHigh << 16);
1029 if (desc.g)
1030 limit = (limit << 12) | mask(12);
1031 }
1032 SegBaseDest = base;
1033 SegLimitDest = limit;
1034 SegAttrDest = attr;
1035 '''
955}};
1036}};