regop.isa (5239:0920dfb94514) | regop.isa (5241:a6602acdd046) |
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1// Copyright (c) 2007 The Hewlett-Packard Development Company 2// All rights reserved. 3// 4// Redistribution and use of this software in source and binary forms, 5// with or without modification, are permitted provided that the 6// following conditions are met: 7// 8// The software must be used only for Non-Commercial Use which means any --- 870 unchanged lines hidden (view full) --- 879 ~(ext & (CFBit | ECFBit | ZFBit | EZFBit)); 880 else 881 ccFlagBits = ccFlagBits | 882 (ext & (CFBit | ECFBit | ZFBit | EZFBit)); 883 ''' 884 885 class Zext(RegOp): 886 code = 'DestReg = bits(psrc1, op2, 0);' | 1// Copyright (c) 2007 The Hewlett-Packard Development Company 2// All rights reserved. 3// 4// Redistribution and use of this software in source and binary forms, 5// with or without modification, are permitted provided that the 6// following conditions are met: 7// 8// The software must be used only for Non-Commercial Use which means any --- 870 unchanged lines hidden (view full) --- 879 ~(ext & (CFBit | ECFBit | ZFBit | EZFBit)); 880 else 881 ccFlagBits = ccFlagBits | 882 (ext & (CFBit | ECFBit | ZFBit | EZFBit)); 883 ''' 884 885 class Zext(RegOp): 886 code = 'DestReg = bits(psrc1, op2, 0);' |
887 888 class Wrcr(RegOp): 889 def __init__(self, dest, src1, flags=None, dataSize="env.dataSize"): 890 super(Wrcr, self).__init__(dest, \ 891 src1, "NUM_INTREGS", flags, dataSize) 892 code = ''' 893 if (dest == 1 || (dest > 4 && dest < 8) || (dest > 8)) { 894 fault = new InvalidOpcode(); 895 } else { 896 // There are *s in the line below so it doesn't confuse the 897 // parser. They may be unnecessary. 898 //Mis*cReg old*Val = pick(Cont*rolDest, 0, dat*aSize); 899 MiscReg newVal = psrc1; 900 901 // Check for any modifications that would cause a fault. 902 switch(dest) { 903 case 0: 904 { 905 Efer efer = EferOp; 906 CR0 cr0 = newVal; 907 CR4 oldCr4 = CR4Op; 908 if (bits(newVal, 63, 32) || 909 (!cr0.pe && cr0.pg) || 910 (!cr0.cd && cr0.nw) || 911 (cr0.pg && efer.lme && !oldCr4.pae)) 912 fault = new GeneralProtection(0); 913 } 914 break; 915 case 2: 916 break; 917 case 3: 918 break; 919 case 4: 920 { 921 CR4 cr4 = newVal; 922 // PAE can't be disabled in long mode. 923 if (bits(newVal, 63, 11) || 924 (machInst.mode.mode == LongMode && !cr4.pae)) 925 fault = new GeneralProtection(0); 926 } 927 break; 928 case 8: 929 { 930 if (bits(newVal, 63, 4)) 931 fault = new GeneralProtection(0); 932 } 933 default: 934 panic("Unrecognized control register %d.\\n", dest); 935 } 936 ControlDest = newVal; 937 } 938 ''' |
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887}}; | 939}}; |