regop.isa (5061:2ac90228c205) regop.isa (5062:4c98f8cdcc11)
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// Redistribution and use of this software in source and binary forms,
5// with or without modification, are permitted provided that the
6// following conditions are met:
7//
8// The software must be used only for Non-Commercial Use which means any

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253 global decoder_output
254 global exec_output
255
256 # Stick all the code together so it can be searched at once
257 allCode = "|".join((code, flag_code, cond_check, else_code))
258
259 # If op2 is used anywhere, make register and immediate versions
260 # of this code.
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// Redistribution and use of this software in source and binary forms,
5// with or without modification, are permitted provided that the
6// following conditions are met:
7//
8// The software must be used only for Non-Commercial Use which means any

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253 global decoder_output
254 global exec_output
255
256 # Stick all the code together so it can be searched at once
257 allCode = "|".join((code, flag_code, cond_check, else_code))
258
259 # If op2 is used anywhere, make register and immediate versions
260 # of this code.
261 matcher = re.compile("op2(?P\\.\\w+)?")
262 if matcher.search(allCode):
261 matcher = re.compile("(?<!\\w)(?P<prefix>s?)op2(?P<typeQual>\\.\\w+)?")
262 match = matcher.search(allCode)
263 if match:
264 typeQual = ""
265 if match.group("typeQual"):
266 typeQual = match.group("typeQual")
267 src2_name = "%spsrc2%s" % (match.group("prefix"), typeQual)
263 self.buildCppClasses(name, Name, suffix,
268 self.buildCppClasses(name, Name, suffix,
264 matcher.sub("psrc2", code),
265 matcher.sub("psrc2", flag_code),
266 matcher.sub("psrc2", cond_check),
267 matcher.sub("psrc2", else_code))
269 matcher.sub(src2_name, code),
270 matcher.sub(src2_name, flag_code),
271 matcher.sub(src2_name, cond_check),
272 matcher.sub(src2_name, else_code))
268 self.buildCppClasses(name + "i", Name, suffix + "Imm",
269 matcher.sub("imm8", code),
270 matcher.sub("imm8", flag_code),
271 matcher.sub("imm8", cond_check),
272 matcher.sub("imm8", else_code))
273 return
274
275 # If there's something optional to do with flags, generate

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457 IntReg srcVal1 = psrc1 & mask(halfSize);
458 IntReg srcVal2 = op2 & mask(halfSize);
459 DestReg = merge(DestReg, srcVal1 * srcVal2, dataSize)
460 '''
461
462 class Mulel(FlagRegOp):
463 code = 'DestReg = merge(DestReg, psrc1 * op2, dataSize);'
464
273 self.buildCppClasses(name + "i", Name, suffix + "Imm",
274 matcher.sub("imm8", code),
275 matcher.sub("imm8", flag_code),
276 matcher.sub("imm8", cond_check),
277 matcher.sub("imm8", else_code))
278 return
279
280 # If there's something optional to do with flags, generate

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462 IntReg srcVal1 = psrc1 & mask(halfSize);
463 IntReg srcVal2 = op2 & mask(halfSize);
464 DestReg = merge(DestReg, srcVal1 * srcVal2, dataSize)
465 '''
466
467 class Mulel(FlagRegOp):
468 code = 'DestReg = merge(DestReg, psrc1 * op2, dataSize);'
469
470 # Neither of these is quite correct because it assumes that right shifting
471 # a signed or unsigned value does sign or zero extension respectively.
472 # The C standard says that what happens on a right shift with a 1 in the
473 # MSB position is undefined. On x86 and under likely most compilers the
474 # "right thing" happens, but this isn't a guarantee.
465 class Muleh(FlagRegOp):
466 code = '''
467 int halfSize = (dataSize * 8) / 2;
468 uint64_t psrc1_h = psrc1 >> halfSize;
469 uint64_t psrc1_l = psrc1 & mask(halfSize);
470 uint64_t psrc2_h = op2 >> halfSize;
471 uint64_t psrc2_l = op2 & mask(halfSize);
472 uint64_t result =
473 ((psrc1_l * psrc2_h + psrc1_h * psrc2_l +
474 ((psrc1_l * psrc2_l) >> halfSize)) >> halfSize) +
475 psrc1_h * psrc2_h;
476 DestReg = merge(DestReg, result, dataSize);
477 '''
478
475 class Muleh(FlagRegOp):
476 code = '''
477 int halfSize = (dataSize * 8) / 2;
478 uint64_t psrc1_h = psrc1 >> halfSize;
479 uint64_t psrc1_l = psrc1 & mask(halfSize);
480 uint64_t psrc2_h = op2 >> halfSize;
481 uint64_t psrc2_l = op2 & mask(halfSize);
482 uint64_t result =
483 ((psrc1_l * psrc2_h + psrc1_h * psrc2_l +
484 ((psrc1_l * psrc2_l) >> halfSize)) >> halfSize) +
485 psrc1_h * psrc2_h;
486 DestReg = merge(DestReg, result, dataSize);
487 '''
488
489 class Mulehs(FlagRegOp):
490 code = '''
491 int halfSize = (dataSize * 8) / 2;
492 int64_t spsrc1_h = spsrc1 >> halfSize;
493 int64_t spsrc1_l = spsrc1 & mask(halfSize);
494 int64_t spsrc2_h = sop2 >> halfSize;
495 int64_t spsrc2_l = sop2 & mask(halfSize);
496 int64_t result =
497 ((spsrc1_l * spsrc2_h + spsrc1_h * spsrc2_l +
498 ((spsrc1_l * spsrc2_l) >> halfSize)) >> halfSize) +
499 spsrc1_h * spsrc2_h;
500 DestReg = merge(DestReg, result, dataSize);
501 '''
502
479 class Div1(FlagRegOp):
480 code = '''
481 int halfSize = (dataSize * 8) / 2;
482 IntReg quotient = (psrc1 / op2) & mask(halfSize);
483 IntReg remainder = (psrc1 % op2) & mask(halfSize);
484 IntReg result = quotient | (remainder << halfSize);
485 DestReg = merge(DestReg, result, dataSize);
486 '''

--- 219 unchanged lines hidden --- 		503 class Div1(FlagRegOp):
504 code = '''
505 int halfSize = (dataSize * 8) / 2;
506 IntReg quotient = (psrc1 / op2) & mask(halfSize);
507 IntReg remainder = (psrc1 % op2) & mask(halfSize);
508 IntReg result = quotient | (remainder << halfSize);
509 DestReg = merge(DestReg, result, dataSize);
510 '''

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