regop.isa (5052:791ae1b04d72) regop.isa (5058:be23162b7370)
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// Redistribution and use of this software in source and binary forms,
5// with or without modification, are permitted provided that the
6// following conditions are met:
7//
8// The software must be used only for Non-Commercial Use which means any

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483
484 class Divr(FlagRegOp):
485 code = 'DestReg = merge(DestReg, psrc1 % op2, dataSize);'
486
487 class Mov(CondRegOp):
488 code = 'DestReg = merge(SrcReg1, op2, dataSize)'
489 else_code = 'DestReg=DestReg;'
490
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// Redistribution and use of this software in source and binary forms,
5// with or without modification, are permitted provided that the
6// following conditions are met:
7//
8// The software must be used only for Non-Commercial Use which means any

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483
484 class Divr(FlagRegOp):
485 code = 'DestReg = merge(DestReg, psrc1 % op2, dataSize);'
486
487 class Mov(CondRegOp):
488 code = 'DestReg = merge(SrcReg1, op2, dataSize)'
489 else_code = 'DestReg=DestReg;'
490
491 class Xorfp(RegOp):
492 code = 'FpDestReg.uqw = FpSrcReg1.uqw ^ FpSrcReg2.uqw;'
493
494 class Movfp(CondRegOp):
495 code = 'FpDestReg.uqw = FpSrcReg2.uqw;'
496 else_code = 'FpDestReg.uqw = FpDestReg.uqw;'
497
498 # Shift instructions
499
500 class Sll(FlagRegOp):
501 code = '''
502 uint8_t shiftAmt = (op2 & ((dataSize == 8) ? mask(6) : mask(5)));
503 DestReg = merge(DestReg, psrc1 << shiftAmt, dataSize);
504 '''
505

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635 uint64_t maskVal = mask(imm8);
636 val = sign_bit ? (val | ~maskVal) : (val & maskVal);
637 DestReg = merge(DestReg, val, dataSize);
638 '''
639
640 class Zext(RegOp):
641 code = 'DestReg = bits(psrc1, imm8-1, 0);'
642
491 # Shift instructions
492
493 class Sll(FlagRegOp):
494 code = '''
495 uint8_t shiftAmt = (op2 & ((dataSize == 8) ? mask(6) : mask(5)));
496 DestReg = merge(DestReg, psrc1 << shiftAmt, dataSize);
497 '''
498

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628 uint64_t maskVal = mask(imm8);
629 val = sign_bit ? (val | ~maskVal) : (val & maskVal);
630 DestReg = merge(DestReg, val, dataSize);
631 '''
632
633 class Zext(RegOp):
634 code = 'DestReg = bits(psrc1, imm8-1, 0);'
635
636 class Compfp(WrRegOp):
637 # This class sets the condition codes in rflags according to the
638 # rules for comparing floating point.
639 code = '''
640 // ZF PF CF
641 // Unordered 1 1 1
642 // Greater than 0 0 0
643 // Less than 0 0 1
644 // Equal 1 0 0
645 // OF = SF = AF = 0
646 ccFlagBits = ccFlagBits & ~(OFBit | SFBit | AFBit |
647 ZFBit | PFBit | CFBit);
648 if (isnan(FpSrcReg1) || isnan(FpSrcReg2))
649 ccFlagBits = ccFlagBits | (ZFBit | PFBit | CFBit);
650 else if(FpSrcReg1 < FpSrcReg2)
651 ccFlagBits = ccFlagBits | CFBit;
652 else if(FpSrcReg1 == FpSrcReg2)
653 ccFlagBits = ccFlagBits | ZFBit;
654 '''
655
656 class Xorfp(RegOp):
657 code = 'FpDestReg.uqw = FpSrcReg1.uqw ^ FpSrcReg2.uqw;'
658
659 class Movfp(CondRegOp):
660 code = 'FpDestReg.uqw = FpSrcReg2.uqw;'
661 else_code = 'FpDestReg.uqw = FpDestReg.uqw;'
662
643 # Conversion microops
644 class ConvOp(RegOp):
645 abstract = True
646 def __init__(self, dest, src1):
647 super(ConvOp, self).__init__(dest, src1, "NUM_INTREGS")
648
649 #FIXME This needs to always use 32 bits unless REX.W is present
650 class cvtf_i2d(ConvOp):

--- 25 unchanged lines hidden --- 		663 # Conversion microops
664 class ConvOp(RegOp):
665 abstract = True
666 def __init__(self, dest, src1):
667 super(ConvOp, self).__init__(dest, src1, "NUM_INTREGS")
668
669 #FIXME This needs to always use 32 bits unless REX.W is present
670 class cvtf_i2d(ConvOp):

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