regop.isa (10805:f2c472d4ff9c) | regop.isa (11320:42ecb523c64a) |
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1// Copyright (c) 2007-2008 The Hewlett-Packard Development Company 2// All rights reserved. 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license --- 224 unchanged lines hidden (view full) --- 233 op_class): 234 235 # Globals to stick the output in 236 global header_output 237 global decoder_output 238 global exec_output 239 240 # Stick all the code together so it can be searched at once | 1// Copyright (c) 2007-2008 The Hewlett-Packard Development Company 2// All rights reserved. 3// 4// The license below extends only to copyright in the software and shall 5// not be construed as granting a license to any other intellectual 6// property including but not limited to intellectual property relating 7// to a hardware implementation of the functionality of the software 8// licensed hereunder. You may use the software subject to the license --- 224 unchanged lines hidden (view full) --- 233 op_class): 234 235 # Globals to stick the output in 236 global header_output 237 global decoder_output 238 global exec_output 239 240 # Stick all the code together so it can be searched at once |
241 allCode = "|".join((code, flag_code, cond_check, else_code, | 241 allCode = "|".join((code, flag_code, cond_check, else_code, |
242 cond_control_flag_init)) 243 allBigCode = "|".join((big_code, flag_code, cond_check, else_code, 244 cond_control_flag_init)) 245 246 # If op2 is used anywhere, make register and immediate versions 247 # of this code. 248 matcher = re.compile(r"(?<!\w)(?P<prefix>s?)op2(?P<typeQual>_[^\W_]+)?") 249 match = matcher.search(allCode + allBigCode) --- 531 unchanged lines hidden (view full) --- 781 // If the shift amount is zero, no flags should be modified. 782 if (shiftAmt) { 783 //Zero out any flags we might modify. This way we only have to 784 //worry about setting them. 785 PredcfofBits = PredcfofBits & ~(ext & (CFBit | OFBit)); 786 PredecfBit = PredecfBit & ~(ext & ECFBit); 787 788 //If some combination of the CF bits need to be set, set them. | 242 cond_control_flag_init)) 243 allBigCode = "|".join((big_code, flag_code, cond_check, else_code, 244 cond_control_flag_init)) 245 246 # If op2 is used anywhere, make register and immediate versions 247 # of this code. 248 matcher = re.compile(r"(?<!\w)(?P<prefix>s?)op2(?P<typeQual>_[^\W_]+)?") 249 match = matcher.search(allCode + allBigCode) --- 531 unchanged lines hidden (view full) --- 781 // If the shift amount is zero, no flags should be modified. 782 if (shiftAmt) { 783 //Zero out any flags we might modify. This way we only have to 784 //worry about setting them. 785 PredcfofBits = PredcfofBits & ~(ext & (CFBit | OFBit)); 786 PredecfBit = PredecfBit & ~(ext & ECFBit); 787 788 //If some combination of the CF bits need to be set, set them. |
789 if ((ext & (CFBit | ECFBit)) && | 789 if ((ext & (CFBit | ECFBit)) && |
790 shiftAmt <= dataSize * 8 && 791 bits(SrcReg1, shiftAmt - 1)) { 792 PredcfofBits = PredcfofBits | (ext & CFBit); 793 PredecfBit = PredecfBit | (ext & ECFBit); 794 } 795 796 //Figure out what the OF bit should be. 797 if ((ext & OFBit) && bits(SrcReg1, dataSize * 8 - 1)) --- 215 unchanged lines hidden (view full) --- 1013 //Zero out any flags we might modify. This way we only have to 1014 //worry about setting them. 1015 PredcfofBits = PredcfofBits & ~(ext & (CFBit | OFBit)); 1016 PredecfBit = PredecfBit & ~(ext & ECFBit); 1017 1018 int msb = bits(DestReg, dataSize * 8 - 1); 1019 int CFBits = bits(SrcReg1, dataSize * 8 - realShiftAmt); 1020 //If some combination of the CF bits need to be set, set them. | 790 shiftAmt <= dataSize * 8 && 791 bits(SrcReg1, shiftAmt - 1)) { 792 PredcfofBits = PredcfofBits | (ext & CFBit); 793 PredecfBit = PredecfBit | (ext & ECFBit); 794 } 795 796 //Figure out what the OF bit should be. 797 if ((ext & OFBit) && bits(SrcReg1, dataSize * 8 - 1)) --- 215 unchanged lines hidden (view full) --- 1013 //Zero out any flags we might modify. This way we only have to 1014 //worry about setting them. 1015 PredcfofBits = PredcfofBits & ~(ext & (CFBit | OFBit)); 1016 PredecfBit = PredecfBit & ~(ext & ECFBit); 1017 1018 int msb = bits(DestReg, dataSize * 8 - 1); 1019 int CFBits = bits(SrcReg1, dataSize * 8 - realShiftAmt); 1020 //If some combination of the CF bits need to be set, set them. |
1021 if ((ext & (CFBit | ECFBit)) && | 1021 if ((ext & (CFBit | ECFBit)) && |
1022 (realShiftAmt == 0) ? origCFBit : CFBits) { 1023 PredcfofBits = PredcfofBits | (ext & CFBit); 1024 PredecfBit = PredecfBit | (ext & ECFBit); 1025 } 1026 1027 //Figure out what the OF bit should be. 1028 if ((ext & OFBit) && (msb ^ CFBits)) 1029 PredcfofBits = PredcfofBits | OFBit; --- 669 unchanged lines hidden --- | 1022 (realShiftAmt == 0) ? origCFBit : CFBits) { 1023 PredcfofBits = PredcfofBits | (ext & CFBit); 1024 PredecfBit = PredecfBit | (ext & ECFBit); 1025 } 1026 1027 //Figure out what the OF bit should be. 1028 if ((ext & OFBit) && (msb ^ CFBits)) 1029 PredcfofBits = PredcfofBits | OFBit; --- 669 unchanged lines hidden --- |