ldstop.isa (7874:c7f15c60898e) ldstop.isa (7967:b243dc8cec8b)
1// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license

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296 "flags" : self.microFlagsText(microFlags),
297 "scale" : self.scale, "index" : self.index,
298 "base" : self.base,
299 "disp" : self.disp,
300 "segment" : self.segment, "data" : self.data,
301 "dataSize" : self.dataSize, "addressSize" : self.addressSize,
302 "memFlags" : self.memFlags}
303 return allocator
1// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license

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296 "flags" : self.microFlagsText(microFlags),
297 "scale" : self.scale, "index" : self.index,
298 "base" : self.base,
299 "disp" : self.disp,
300 "segment" : self.segment, "data" : self.data,
301 "dataSize" : self.dataSize, "addressSize" : self.addressSize,
302 "memFlags" : self.memFlags}
303 return allocator
304
305 class BigLdStOp(X86Microop):
306 def __init__(self, data, segment, addr, disp,
307 dataSize, addressSize, baseFlags, atCPL0, prefetch):
308 self.data = data
309 [self.scale, self.index, self.base] = addr
310 self.disp = disp
311 self.segment = segment
312 self.dataSize = dataSize
313 self.addressSize = addressSize
314 self.memFlags = baseFlags
315 if atCPL0:
316 self.memFlags += " | (CPL0FlagBit << FlagShift)"
317 if prefetch:
318 self.memFlags += " | Request::PREFETCH"
319 self.memFlags += " | (machInst.legacy.addr ? " + \
320 "(AddrSizeFlagBit << FlagShift) : 0)"
321
322 def getAllocator(self, microFlags):
323 allocString = '''
324 (%(dataSize)s >= 4) ?
325 (StaticInstPtr)(new %(class_name)sBig(machInst,
326 macrocodeBlock, %(flags)s, %(scale)s, %(index)s,
327 %(base)s, %(disp)s, %(segment)s, %(data)s,
328 %(dataSize)s, %(addressSize)s, %(memFlags)s)) :
329 (StaticInstPtr)(new %(class_name)s(machInst,
330 macrocodeBlock, %(flags)s, %(scale)s, %(index)s,
331 %(base)s, %(disp)s, %(segment)s, %(data)s,
332 %(dataSize)s, %(addressSize)s, %(memFlags)s))
333 '''
334 allocator = allocString % {
335 "class_name" : self.className,
336 "flags" : self.microFlagsText(microFlags),
337 "scale" : self.scale, "index" : self.index,
338 "base" : self.base,
339 "disp" : self.disp,
340 "segment" : self.segment, "data" : self.data,
341 "dataSize" : self.dataSize, "addressSize" : self.addressSize,
342 "memFlags" : self.memFlags}
343 return allocator
304}};
305
306let {{
307
308 # Make these empty strings so that concatenating onto
309 # them will always work.
310 header_output = ""
311 decoder_output = ""
312 exec_output = ""
313
314 calculateEA = '''
315 EA = bits(SegBase + scale * Index + Base + disp, addressSize * 8 - 1, 0);
316 '''
317
344}};
345
346let {{
347
348 # Make these empty strings so that concatenating onto
349 # them will always work.
350 header_output = ""
351 decoder_output = ""
352 exec_output = ""
353
354 calculateEA = '''
355 EA = bits(SegBase + scale * Index + Base + disp, addressSize * 8 - 1, 0);
356 '''
357
318 def defineMicroLoadOp(mnemonic, code, mem_flags="0"):
358 def defineMicroLoadOp(mnemonic, code, bigCode='',
359 mem_flags="0", big=True):
319 global header_output
320 global decoder_output
321 global exec_output
322 global microopClasses
323 Name = mnemonic
324 name = mnemonic.lower()
325
326 # Build up the all register version of this micro op
360 global header_output
361 global decoder_output
362 global exec_output
363 global microopClasses
364 Name = mnemonic
365 name = mnemonic.lower()
366
367 # Build up the all register version of this micro op
327 iop = InstObjParams(name, Name, 'X86ISA::LdStOp',
328 {"code": code,
329 "ea_code": calculateEA})
330 header_output += MicroLdStOpDeclare.subst(iop)
331 decoder_output += MicroLdStOpConstructor.subst(iop)
332 exec_output += MicroLoadExecute.subst(iop)
333 exec_output += MicroLoadInitiateAcc.subst(iop)
334 exec_output += MicroLoadCompleteAcc.subst(iop)
368 iops = [InstObjParams(name, Name, 'X86ISA::LdStOp',
369 {"code": code, "ea_code": calculateEA})]
370 if big:
371 iops += [InstObjParams(name, Name + "Big", 'X86ISA::LdStOp',
372 {"code": bigCode, "ea_code": calculateEA})]
373 for iop in iops:
374 header_output += MicroLdStOpDeclare.subst(iop)
375 decoder_output += MicroLdStOpConstructor.subst(iop)
376 exec_output += MicroLoadExecute.subst(iop)
377 exec_output += MicroLoadInitiateAcc.subst(iop)
378 exec_output += MicroLoadCompleteAcc.subst(iop)
335
379
336 class LoadOp(LdStOp):
380 base = LdStOp
381 if big:
382 base = BigLdStOp
383 class LoadOp(base):
337 def __init__(self, data, segment, addr, disp = 0,
338 dataSize="env.dataSize",
339 addressSize="env.addressSize",
340 atCPL0=False, prefetch=False):
341 super(LoadOp, self).__init__(data, segment, addr,
342 disp, dataSize, addressSize, mem_flags,
343 atCPL0, prefetch)
344 self.className = Name
345 self.mnemonic = name
346
347 microopClasses[name] = LoadOp
348
384 def __init__(self, data, segment, addr, disp = 0,
385 dataSize="env.dataSize",
386 addressSize="env.addressSize",
387 atCPL0=False, prefetch=False):
388 super(LoadOp, self).__init__(data, segment, addr,
389 disp, dataSize, addressSize, mem_flags,
390 atCPL0, prefetch)
391 self.className = Name
392 self.mnemonic = name
393
394 microopClasses[name] = LoadOp
395
349 defineMicroLoadOp('Ld', 'Data = merge(Data, Mem, dataSize);')
396 defineMicroLoadOp('Ld', 'Data = merge(Data, Mem, dataSize);',
397 'Data = Mem & mask(dataSize * 8);')
350 defineMicroLoadOp('Ldst', 'Data = merge(Data, Mem, dataSize);',
398 defineMicroLoadOp('Ldst', 'Data = merge(Data, Mem, dataSize);',
351 '(StoreCheck << FlagShift)')
399 'Data = Mem & mask(dataSize * 8);',
400 '(StoreCheck << FlagShift)')
352 defineMicroLoadOp('Ldstl', 'Data = merge(Data, Mem, dataSize);',
401 defineMicroLoadOp('Ldstl', 'Data = merge(Data, Mem, dataSize);',
353 '(StoreCheck << FlagShift) | Request::LOCKED')
354 defineMicroLoadOp('Ldfp', 'FpData.uqw = Mem;')
402 'Data = Mem & mask(dataSize * 8);',
403 '(StoreCheck << FlagShift) | Request::LOCKED')
404 defineMicroLoadOp('Ldfp', 'FpData.uqw = Mem;', big = False)
355
356 def defineMicroStoreOp(mnemonic, code, \
357 postCode="", completeCode="", mem_flags="0"):
358 global header_output
359 global decoder_output
360 global exec_output
361 global microopClasses
362 Name = mnemonic

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406 def defineMicroStoreOp(mnemonic, code, \
407 postCode="", completeCode="", mem_flags="0"):
408 global header_output
409 global decoder_output
410 global exec_output
411 global microopClasses
412 Name = mnemonic

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