| ldstop.isa (6345:f9ae7c3a036c) | ldstop.isa (6624:b157ef23d76c) |
|---|---|
| 1// Copyright (c) 2008 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 515 unchanged lines hidden (view full) --- 524 525 microopClasses["tia"] = TiaOp 526 527 class CdaOp(LdStOp): 528 def __init__(self, segment, addr, disp = 0, 529 dataSize="env.dataSize", 530 addressSize="env.addressSize", atCPL0=False): 531 super(CdaOp, self).__init__("InstRegIndex(NUM_INTREGS)", segment, | 1// Copyright (c) 2008 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 515 unchanged lines hidden (view full) --- 524 525 microopClasses["tia"] = TiaOp 526 527 class CdaOp(LdStOp): 528 def __init__(self, segment, addr, disp = 0, 529 dataSize="env.dataSize", 530 addressSize="env.addressSize", atCPL0=False): 531 super(CdaOp, self).__init__("InstRegIndex(NUM_INTREGS)", segment, |
| 532 addr, disp, dataSize, addressSize, "0", atCPL0, False) | 532 addr, disp, dataSize, addressSize, "Request::NO_ACCESS", 533 atCPL0, False) |
| 533 self.className = "Cda" 534 self.mnemonic = "cda" 535 536 microopClasses["cda"] = CdaOp 537}}; 538 | 534 self.className = "Cda" 535 self.mnemonic = "cda" 536 537 microopClasses["cda"] = CdaOp 538}}; 539 |