ldstop.isa (6132:916f10213bea) | ldstop.isa (6345:f9ae7c3a036c) |
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1// Copyright (c) 2008 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 107 unchanged lines hidden (view full) --- 116 { 117 protected: 118 void buildMe(); 119 120 public: 121 %(class_name)s(ExtMachInst _machInst, 122 const char * instMnem, 123 bool isMicro, bool isDelayed, bool isFirst, bool isLast, | 1// Copyright (c) 2008 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright --- 107 unchanged lines hidden (view full) --- 116 { 117 protected: 118 void buildMe(); 119 120 public: 121 %(class_name)s(ExtMachInst _machInst, 122 const char * instMnem, 123 bool isMicro, bool isDelayed, bool isFirst, bool isLast, |
124 uint8_t _scale, RegIndex _index, RegIndex _base, 125 uint64_t _disp, uint8_t _segment, 126 RegIndex _data, | 124 uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 125 uint64_t _disp, InstRegIndex _segment, 126 InstRegIndex _data, |
127 uint8_t _dataSize, uint8_t _addressSize, 128 Request::FlagsType _memFlags); 129 130 %(class_name)s(ExtMachInst _machInst, 131 const char * instMnem, | 127 uint8_t _dataSize, uint8_t _addressSize, 128 Request::FlagsType _memFlags); 129 130 %(class_name)s(ExtMachInst _machInst, 131 const char * instMnem, |
132 uint8_t _scale, RegIndex _index, RegIndex _base, 133 uint64_t _disp, uint8_t _segment, 134 RegIndex _data, | 132 uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 133 uint64_t _disp, InstRegIndex _segment, 134 InstRegIndex _data, |
135 uint8_t _dataSize, uint8_t _addressSize, 136 Request::FlagsType _memFlags); 137 138 %(BasicExecDeclare)s 139 }; 140}}; 141 142// Load templates --- 149 unchanged lines hidden (view full) --- 292 { 293 protected: 294 void buildMe(); 295 296 public: 297 %(class_name)s(ExtMachInst _machInst, 298 const char * instMnem, 299 bool isMicro, bool isDelayed, bool isFirst, bool isLast, | 135 uint8_t _dataSize, uint8_t _addressSize, 136 Request::FlagsType _memFlags); 137 138 %(BasicExecDeclare)s 139 }; 140}}; 141 142// Load templates --- 149 unchanged lines hidden (view full) --- 292 { 293 protected: 294 void buildMe(); 295 296 public: 297 %(class_name)s(ExtMachInst _machInst, 298 const char * instMnem, 299 bool isMicro, bool isDelayed, bool isFirst, bool isLast, |
300 uint8_t _scale, RegIndex _index, RegIndex _base, 301 uint64_t _disp, uint8_t _segment, 302 RegIndex _data, | 300 uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 301 uint64_t _disp, InstRegIndex _segment, 302 InstRegIndex _data, |
303 uint8_t _dataSize, uint8_t _addressSize, 304 Request::FlagsType _memFlags); 305 306 %(class_name)s(ExtMachInst _machInst, 307 const char * instMnem, | 303 uint8_t _dataSize, uint8_t _addressSize, 304 Request::FlagsType _memFlags); 305 306 %(class_name)s(ExtMachInst _machInst, 307 const char * instMnem, |
308 uint8_t _scale, RegIndex _index, RegIndex _base, 309 uint64_t _disp, uint8_t _segment, 310 RegIndex _data, | 308 uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 309 uint64_t _disp, InstRegIndex _segment, 310 InstRegIndex _data, |
311 uint8_t _dataSize, uint8_t _addressSize, 312 Request::FlagsType _memFlags); 313 314 %(BasicExecDeclare)s 315 316 %(InitiateAccDeclare)s 317 318 %(CompleteAccDeclare)s --- 4 unchanged lines hidden (view full) --- 323 324 inline void %(class_name)s::buildMe() 325 { 326 %(constructor)s; 327 } 328 329 inline %(class_name)s::%(class_name)s( 330 ExtMachInst machInst, const char * instMnem, | 311 uint8_t _dataSize, uint8_t _addressSize, 312 Request::FlagsType _memFlags); 313 314 %(BasicExecDeclare)s 315 316 %(InitiateAccDeclare)s 317 318 %(CompleteAccDeclare)s --- 4 unchanged lines hidden (view full) --- 323 324 inline void %(class_name)s::buildMe() 325 { 326 %(constructor)s; 327 } 328 329 inline %(class_name)s::%(class_name)s( 330 ExtMachInst machInst, const char * instMnem, |
331 uint8_t _scale, RegIndex _index, RegIndex _base, 332 uint64_t _disp, uint8_t _segment, 333 RegIndex _data, | 331 uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 332 uint64_t _disp, InstRegIndex _segment, 333 InstRegIndex _data, |
334 uint8_t _dataSize, uint8_t _addressSize, 335 Request::FlagsType _memFlags) : 336 %(base_class)s(machInst, "%(mnemonic)s", instMnem, 337 false, false, false, false, 338 _scale, _index, _base, 339 _disp, _segment, _data, 340 _dataSize, _addressSize, _memFlags, %(op_class)s) 341 { 342 buildMe(); 343 } 344 345 inline %(class_name)s::%(class_name)s( 346 ExtMachInst machInst, const char * instMnem, 347 bool isMicro, bool isDelayed, bool isFirst, bool isLast, | 334 uint8_t _dataSize, uint8_t _addressSize, 335 Request::FlagsType _memFlags) : 336 %(base_class)s(machInst, "%(mnemonic)s", instMnem, 337 false, false, false, false, 338 _scale, _index, _base, 339 _disp, _segment, _data, 340 _dataSize, _addressSize, _memFlags, %(op_class)s) 341 { 342 buildMe(); 343 } 344 345 inline %(class_name)s::%(class_name)s( 346 ExtMachInst machInst, const char * instMnem, 347 bool isMicro, bool isDelayed, bool isFirst, bool isLast, |
348 uint8_t _scale, RegIndex _index, RegIndex _base, 349 uint64_t _disp, uint8_t _segment, 350 RegIndex _data, | 348 uint8_t _scale, InstRegIndex _index, InstRegIndex _base, 349 uint64_t _disp, InstRegIndex _segment, 350 InstRegIndex _data, |
351 uint8_t _dataSize, uint8_t _addressSize, 352 Request::FlagsType _memFlags) : 353 %(base_class)s(machInst, "%(mnemonic)s", instMnem, 354 isMicro, isDelayed, isFirst, isLast, 355 _scale, _index, _base, 356 _disp, _segment, _data, 357 _dataSize, _addressSize, _memFlags, %(op_class)s) 358 { --- 153 unchanged lines hidden (view full) --- 512 header_output += MicroLeaDeclare.subst(iop) 513 decoder_output += MicroLdStOpConstructor.subst(iop) 514 exec_output += MicroLeaExecute.subst(iop) 515 516 class TiaOp(LdStOp): 517 def __init__(self, segment, addr, disp = 0, 518 dataSize="env.dataSize", 519 addressSize="env.addressSize"): | 351 uint8_t _dataSize, uint8_t _addressSize, 352 Request::FlagsType _memFlags) : 353 %(base_class)s(machInst, "%(mnemonic)s", instMnem, 354 isMicro, isDelayed, isFirst, isLast, 355 _scale, _index, _base, 356 _disp, _segment, _data, 357 _dataSize, _addressSize, _memFlags, %(op_class)s) 358 { --- 153 unchanged lines hidden (view full) --- 512 header_output += MicroLeaDeclare.subst(iop) 513 decoder_output += MicroLdStOpConstructor.subst(iop) 514 exec_output += MicroLeaExecute.subst(iop) 515 516 class TiaOp(LdStOp): 517 def __init__(self, segment, addr, disp = 0, 518 dataSize="env.dataSize", 519 addressSize="env.addressSize"): |
520 super(TiaOp, self).__init__("NUM_INTREGS", segment, | 520 super(TiaOp, self).__init__("InstRegIndex(NUM_INTREGS)", segment, |
521 addr, disp, dataSize, addressSize, "0", False, False) 522 self.className = "Tia" 523 self.mnemonic = "tia" 524 525 microopClasses["tia"] = TiaOp 526 527 class CdaOp(LdStOp): 528 def __init__(self, segment, addr, disp = 0, 529 dataSize="env.dataSize", 530 addressSize="env.addressSize", atCPL0=False): | 521 addr, disp, dataSize, addressSize, "0", False, False) 522 self.className = "Tia" 523 self.mnemonic = "tia" 524 525 microopClasses["tia"] = TiaOp 526 527 class CdaOp(LdStOp): 528 def __init__(self, segment, addr, disp = 0, 529 dataSize="env.dataSize", 530 addressSize="env.addressSize", atCPL0=False): |
531 super(CdaOp, self).__init__("NUM_INTREGS", segment, | 531 super(CdaOp, self).__init__("InstRegIndex(NUM_INTREGS)", segment, |
532 addr, disp, dataSize, addressSize, "0", atCPL0, False) 533 self.className = "Cda" 534 self.mnemonic = "cda" 535 536 microopClasses["cda"] = CdaOp 537}}; 538 | 532 addr, disp, dataSize, addressSize, "0", atCPL0, False) 533 self.className = "Cda" 534 self.mnemonic = "cda" 535 536 microopClasses["cda"] = CdaOp 537}}; 538 |