ldstop.isa (5890:bdef71accd68) ldstop.isa (5892:a0ef4a6349dc)
1// Copyright (c) 2008 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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223
224 %(code)s;
225
226 if(fault == NoFault)
227 {
228 fault = write(xc, Mem, EA, (%(mem_flags)s) | segment);
229 if(fault == NoFault)
230 {
1// Copyright (c) 2008 The Regents of The University of Michigan
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are
6// met: redistributions of source code must retain the above copyright
7// notice, this list of conditions and the following disclaimer;
8// redistributions in binary form must reproduce the above copyright

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223
224 %(code)s;
225
226 if(fault == NoFault)
227 {
228 fault = write(xc, Mem, EA, (%(mem_flags)s) | segment);
229 if(fault == NoFault)
230 {
231 %(post_code)s;
231 %(op_wb)s;
232 }
233 }
234
235 return fault;
236 }
237}};
238

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247 %(op_rd)s;
248 %(ea_code)s;
249 DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA);
250
251 %(code)s;
252
253 if(fault == NoFault)
254 {
232 %(op_wb)s;
233 }
234 }
235
236 return fault;
237 }
238}};
239

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248 %(op_rd)s;
249 %(ea_code)s;
250 DPRINTF(X86, "%s : %s: The address is %#x\n", instMnem, mnemonic, EA);
251
252 %(code)s;
253
254 if(fault == NoFault)
255 {
255 fault = write(xc, Mem, EA, (%(mem_flags)s) | segment);
256 if(fault == NoFault)
257 {
258 %(op_wb)s;
259 }
256 write(xc, Mem, EA, (%(mem_flags)s) | segment);
260 }
261 return fault;
262 }
263}};
264
265def template MicroStoreCompleteAcc {{
257 }
258 return fault;
259 }
260}};
261
262def template MicroStoreCompleteAcc {{
266 Fault %(class_name)s::completeAcc(PacketPtr, %(CPU_exec_context)s * xc,
267 Trace::InstRecord * traceData) const
263 Fault %(class_name)s::completeAcc(PacketPtr pkt,
264 %(CPU_exec_context)s * xc, Trace::InstRecord * traceData) const
268 {
265 {
266 %(op_decl)s;
267 %(op_rd)s;
268 %(complete_code)s;
269 %(op_wb)s;
269 return NoFault;
270 }
271}};
272
273// Common templates
274
275//This delcares the initiateAcc function in memory operations
276def template InitiateAccDeclare {{

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414 self.mnemonic = name
415
416 microopClasses[name] = LoadOp
417
418 defineMicroLoadOp('Ld', 'Data = merge(Data, Mem, dataSize);')
419 defineMicroLoadOp('Ldst', 'Data = merge(Data, Mem, dataSize);', 'StoreCheck')
420 defineMicroLoadOp('Ldfp', 'FpData.uqw = Mem;')
421
270 return NoFault;
271 }
272}};
273
274// Common templates
275
276//This delcares the initiateAcc function in memory operations
277def template InitiateAccDeclare {{

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415 self.mnemonic = name
416
417 microopClasses[name] = LoadOp
418
419 defineMicroLoadOp('Ld', 'Data = merge(Data, Mem, dataSize);')
420 defineMicroLoadOp('Ldst', 'Data = merge(Data, Mem, dataSize);', 'StoreCheck')
421 defineMicroLoadOp('Ldfp', 'FpData.uqw = Mem;')
422
422 def defineMicroStoreOp(mnemonic, code, mem_flags=0):
423 def defineMicroStoreOp(mnemonic, code, \
424 postCode="", completeCode="", mem_flags=0):
423 global header_output
424 global decoder_output
425 global exec_output
426 global microopClasses
427 Name = mnemonic
428 name = mnemonic.lower()
429
430 # Build up the all register version of this micro op
431 iop = InstObjParams(name, Name, 'X86ISA::LdStOp',
432 {"code": code,
425 global header_output
426 global decoder_output
427 global exec_output
428 global microopClasses
429 Name = mnemonic
430 name = mnemonic.lower()
431
432 # Build up the all register version of this micro op
433 iop = InstObjParams(name, Name, 'X86ISA::LdStOp',
434 {"code": code,
435 "post_code": postCode,
436 "complete_code": completeCode,
433 "ea_code": calculateEA,
434 "mem_flags": mem_flags})
435 header_output += MicroLdStOpDeclare.subst(iop)
436 decoder_output += MicroLdStOpConstructor.subst(iop)
437 exec_output += MicroStoreExecute.subst(iop)
438 exec_output += MicroStoreInitiateAcc.subst(iop)
439 exec_output += MicroStoreCompleteAcc.subst(iop)
440

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445 addr, disp, dataSize, addressSize)
446 self.className = Name
447 self.mnemonic = name
448
449 microopClasses[name] = StoreOp
450
451 defineMicroStoreOp('St', 'Mem = Data;')
452 defineMicroStoreOp('Stfp', 'Mem = FpData.uqw;')
437 "ea_code": calculateEA,
438 "mem_flags": mem_flags})
439 header_output += MicroLdStOpDeclare.subst(iop)
440 decoder_output += MicroLdStOpConstructor.subst(iop)
441 exec_output += MicroStoreExecute.subst(iop)
442 exec_output += MicroStoreInitiateAcc.subst(iop)
443 exec_output += MicroStoreCompleteAcc.subst(iop)
444

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449 addr, disp, dataSize, addressSize)
450 self.className = Name
451 self.mnemonic = name
452
453 microopClasses[name] = StoreOp
454
455 defineMicroStoreOp('St', 'Mem = Data;')
456 defineMicroStoreOp('Stfp', 'Mem = FpData.uqw;')
453 defineMicroStoreOp('Stupd', '''
454 Mem = Data;
455 Base = merge(Base, EA - SegBase, addressSize);
456 ''');
457 defineMicroStoreOp('Cda', 'Mem = 0;', "Request::NO_ACCESS")
457 defineMicroStoreOp('Stupd', 'Mem = Data;',
458 'Base = merge(Base, EA - SegBase, addressSize);',
459 'Base = merge(Base, pkt->req->getVaddr() - SegBase, addressSize);');
460 defineMicroStoreOp('Cda', 'Mem = 0;', mem_flags="Request::NO_ACCESS")
458
459 iop = InstObjParams("lea", "Lea", 'X86ISA::LdStOp',
460 {"code": "Data = merge(Data, EA, dataSize);",
461 "ea_code": calculateEA,
462 "mem_flags": 0})
463 header_output += MicroLeaDeclare.subst(iop)
464 decoder_output += MicroLdStOpConstructor.subst(iop)
465 exec_output += MicroLeaExecute.subst(iop)

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462 iop = InstObjParams("lea", "Lea", 'X86ISA::LdStOp',
463 {"code": "Data = merge(Data, EA, dataSize);",
464 "ea_code": calculateEA,
465 "mem_flags": 0})
466 header_output += MicroLeaDeclare.subst(iop)
467 decoder_output += MicroLdStOpConstructor.subst(iop)
468 exec_output += MicroLeaExecute.subst(iop)

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