fpop.isa (9893:5924b77fb8fc) fpop.isa (9894:c0a3920859bd)
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// Copyright (c) 2012-2013 Mark D. Hill and David A. Wood
3// All rights reserved.
4//
5// The license below extends only to copyright in the software and shall
6// not be construed as granting a license to any other intellectual
7// property including but not limited to intellectual property relating
8// to a hardware implementation of the functionality of the software

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290 code = 'FpDestReg = tan(FpSrcReg1);'
291 op_class = 'FloatSqrtOp'
292
293
294 # Conversion microops
295 class ConvOp(FpBinaryOp):
296 abstract = True
297 op_class = 'FloatCvtOp'
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// Copyright (c) 2012-2013 Mark D. Hill and David A. Wood
3// All rights reserved.
4//
5// The license below extends only to copyright in the software and shall
6// not be construed as granting a license to any other intellectual
7// property including but not limited to intellectual property relating
8// to a hardware implementation of the functionality of the software

--- 281 unchanged lines hidden (view full) ---

290 code = 'FpDestReg = tan(FpSrcReg1);'
291 op_class = 'FloatSqrtOp'
292
293
294 # Conversion microops
295 class ConvOp(FpBinaryOp):
296 abstract = True
297 op_class = 'FloatCvtOp'
298 def __init__(self, dest, src1):
298 def __init__(self, dest, src1, **kwargs):
299 super(ConvOp, self).__init__(dest, src1, \
299 super(ConvOp, self).__init__(dest, src1, \
300 "InstRegIndex(FLOATREG_MICROFP0)")
300 "InstRegIndex(FLOATREG_MICROFP0)", \
301 **kwargs)
301
302 # These probably shouldn't look at the ExtMachInst directly to figure
303 # out what size to use and should instead delegate that to the macroop's
304 # constructor. That would be more efficient, and it would make the
305 # microops a little more modular.
306 class cvtf_i2d(ConvOp):
307 code = '''
308 X86IntReg intReg = SSrcReg1;

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319 code = '''
320 int64_t intSrcReg1 = static_cast<int64_t>(FpSrcReg1);
321 if (REX_W)
322 SDestReg = intSrcReg1;
323 else
324 SDestReg = merge(SDestReg, intSrcReg1, 4);
325 '''
326
302
303 # These probably shouldn't look at the ExtMachInst directly to figure
304 # out what size to use and should instead delegate that to the macroop's
305 # constructor. That would be more efficient, and it would make the
306 # microops a little more modular.
307 class cvtf_i2d(ConvOp):
308 code = '''
309 X86IntReg intReg = SSrcReg1;

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320 code = '''
321 int64_t intSrcReg1 = static_cast<int64_t>(FpSrcReg1);
322 if (REX_W)
323 SDestReg = intSrcReg1;
324 else
325 SDestReg = merge(SDestReg, intSrcReg1, 4);
326 '''
327
328 # Convert two integers registers representing an 80-bit floating
329 # point number to an x87 register.
330 class cvtint_fp80(FpBinaryOp):
331 code = '''
332 uint8_t bits[10];
333 *(uint64_t *)(bits + 0) = SSrcReg1;
334 *(uint16_t *)(bits + 8) = (uint16_t)SSrcReg2;
335 FpDestReg = loadFloat80(bits);
336 '''
337
338 # Convert an x87 register (double) into extended precision and
339 # extract the highest 64 bits.
340 class cvtfp80h_int(ConvOp):
341 code = '''
342 char bits[10];
343 storeFloat80(bits, FpSrcReg1);
344 SDestReg = *(uint64_t *)(bits + 0);
345 '''
346
347 # Convert an x87 register (double) into extended precision and
348 # extract the lowest 16 bits.
349 class cvtfp80l_int(ConvOp):
350 code = '''
351 char bits[10];
352 storeFloat80(bits, FpSrcReg1);
353 SDestReg = *(uint16_t *)(bits + 8);
354 '''
355
327 # These need to consider size at some point. They'll always use doubles
328 # for the moment.
329 class addfp(FpBinaryOp):
330 code = 'FpDestReg = FpSrcReg1 + FpSrcReg2;'
331
332 class mulfp(FpBinaryOp):
333 code = 'FpDestReg = FpSrcReg1 * FpSrcReg2;'
334 op_class = 'FloatMultOp'

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356 # These need to consider size at some point. They'll always use doubles
357 # for the moment.
358 class addfp(FpBinaryOp):
359 code = 'FpDestReg = FpSrcReg1 + FpSrcReg2;'
360
361 class mulfp(FpBinaryOp):
362 code = 'FpDestReg = FpSrcReg1 * FpSrcReg2;'
363 op_class = 'FloatMultOp'

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