fpop.isa (9758:353587055aff) fpop.isa (9761:f2102d45a753)
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// Copyright (c) 2012-2013 Mark D. Hill and David A. Wood
3// All rights reserved.
4//
5// The license below extends only to copyright in the software and shall
6// not be construed as granting a license to any other intellectual
7// property including but not limited to intellectual property relating
8// to a hardware implementation of the functionality of the software

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325 class Yl2xFp(FpBinaryOp):
326 code = '''
327 FpDestReg = FpSrcReg2 * (log(FpSrcReg1) / log(2));
328 '''
329 op_class = 'FloatSqrtOp'
330
331 class PremFp(FpBinaryOp):
332 code = '''
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// Copyright (c) 2012-2013 Mark D. Hill and David A. Wood
3// All rights reserved.
4//
5// The license below extends only to copyright in the software and shall
6// not be construed as granting a license to any other intellectual
7// property including but not limited to intellectual property relating
8// to a hardware implementation of the functionality of the software

--- 316 unchanged lines hidden (view full) ---

325 class Yl2xFp(FpBinaryOp):
326 code = '''
327 FpDestReg = FpSrcReg2 * (log(FpSrcReg1) / log(2));
328 '''
329 op_class = 'FloatSqrtOp'
330
331 class PremFp(FpBinaryOp):
332 code = '''
333 FpDestReg = fmod(FpSrcReg1, FpSrcReg2);
334 DPRINTF(X86, "src1: %lf, src2: %lf, dest: %lf\\n", FpSrcReg1, FpSrcReg2, FpDestReg);
333 MiscReg new_fsw(FSW);
334 int src1_exp;
335 int src2_exp;
336 std::frexp(FpSrcReg1, &src1_exp);
337 std::frexp(FpSrcReg2, &src2_exp);
338
339 const int d(src2_exp - src1_exp);
340 if (d < 64) {
341 const int64_t q(std::trunc(FpSrcReg2 / FpSrcReg1));
342 FpDestReg = FpSrcReg2 - FpSrcReg1 * q;
343 new_fsw &= ~(CC0Bit | CC1Bit | CC2Bit | CC2Bit);
344 new_fsw |= (q & 0x1) ? CC1Bit : 0;
345 new_fsw |= (q & 0x2) ? CC3Bit : 0;
346 new_fsw |= (q & 0x4) ? CC0Bit : 0;
347 } else {
348 const int n(42);
349 const int64_t qq(std::trunc(
350 FpSrcReg2 / std::ldexp(FpSrcReg1, d - n)));
351 FpDestReg = FpSrcReg2 - std::ldexp(FpSrcReg1 * qq, d - n);
352 new_fsw |= CC2Bit;
353 }
354 DPRINTF(X86, "src1: %lf, src2: %lf, dest: %lf, FSW: 0x%x\\n",
355 FpSrcReg1, FpSrcReg2, FpDestReg, new_fsw);
335 '''
336 op_class = 'FloatDivOp'
337
356 '''
357 op_class = 'FloatDivOp'
358
359 flag_code = 'FSW = new_fsw;'
360
338 class Compfp(FpBinaryOp):
339 def __init__(self, src1, src2, spm=0, setStatus=False, \
340 dataSize="env.dataSize"):
341 super(Compfp, self).__init__("InstRegIndex(FLOATREG_MICROFP0)", \
342 src1, src2, spm, setStatus, dataSize)
343 # This class sets the condition codes in rflags according to the
344 # rules for comparing floating point.
345 code = '''

--- 28 unchanged lines hidden --- 		361 class Compfp(FpBinaryOp):
362 def __init__(self, src1, src2, spm=0, setStatus=False, \
363 dataSize="env.dataSize"):
364 super(Compfp, self).__init__("InstRegIndex(FLOATREG_MICROFP0)", \
365 src1, src2, spm, setStatus, dataSize)
366 # This class sets the condition codes in rflags according to the
367 # rules for comparing floating point.
368 code = '''

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