fpop.isa (9211:46c3a74952ec) fpop.isa (9371:7c1484cc9b10)
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license

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169 code, flag_code, cond_check, else_code)
170
171 # Hook into the microassembler dict
172 global microopClasses
173 microopClasses[name] = cls
174
175 return cls
176
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license

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169 code, flag_code, cond_check, else_code)
170
171 # Hook into the microassembler dict
172 global microopClasses
173 microopClasses[name] = cls
174
175 return cls
176
177 class FpUnaryOp(X86Microop):
178 __metaclass__ = FpOpMeta
179 # This class itself doesn't act as a microop
180 abstract = True
177
181
178 class FpOp(X86Microop):
182 # Default template parameter values
183 flag_code = ""
184 cond_check = "true"
185 else_code = ";"
186
187 def __init__(self, dest, src1, spm=0, \
188 SetStatus=False, dataSize="env.dataSize"):
189 self.dest = dest
190 self.src1 = src1
191 self.src2 = "InstRegIndex(0)"
192 self.spm = spm
193 self.dataSize = dataSize
194 if SetStatus:
195 self.className += "Flags"
196 if spm:
197 self.className += "Top"
198
199 def getAllocator(self, microFlags):
200 return '''new %(class_name)s(machInst, macrocodeBlock,
201 %(flags)s, %(src1)s, %(src2)s, %(dest)s,
202 %(dataSize)s, %(spm)d)''' % {
203 "class_name" : self.className,
204 "flags" : self.microFlagsText(microFlags),
205 "src1" : self.src1, "src2" : self.src2,
206 "dest" : self.dest,
207 "dataSize" : self.dataSize,
208 "spm" : self.spm}
209
210 class FpBinaryOp(X86Microop):
179 __metaclass__ = FpOpMeta
180 # This class itself doesn't act as a microop
181 abstract = True
182
183 # Default template parameter values
184 flag_code = ""
185 cond_check = "true"
186 else_code = ";"

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203 %(dataSize)s, %(spm)d)''' % {
204 "class_name" : self.className,
205 "flags" : self.microFlagsText(microFlags),
206 "src1" : self.src1, "src2" : self.src2,
207 "dest" : self.dest,
208 "dataSize" : self.dataSize,
209 "spm" : self.spm}
210
211 __metaclass__ = FpOpMeta
212 # This class itself doesn't act as a microop
213 abstract = True
214
215 # Default template parameter values
216 flag_code = ""
217 cond_check = "true"
218 else_code = ";"

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235 %(dataSize)s, %(spm)d)''' % {
236 "class_name" : self.className,
237 "flags" : self.microFlagsText(microFlags),
238 "src1" : self.src1, "src2" : self.src2,
239 "dest" : self.dest,
240 "dataSize" : self.dataSize,
241 "spm" : self.spm}
242
211 class Movfp(FpOp):
212 def __init__(self, dest, src1, spm=0, \
213 SetStatus=False, dataSize="env.dataSize"):
214 super(Movfp, self).__init__(dest, src1, "InstRegIndex(0)", \
215 spm, SetStatus, dataSize)
243 class Movfp(FpUnaryOp):
216 code = 'FpDestReg_uqw = FpSrcReg1_uqw;'
217 else_code = 'FpDestReg_uqw = FpDestReg_uqw;'
218 cond_check = "checkCondition(ccFlagBits | cfofBits | dfBit | \
219 ecfBit | ezfBit, src2)"
220
244 code = 'FpDestReg_uqw = FpSrcReg1_uqw;'
245 else_code = 'FpDestReg_uqw = FpDestReg_uqw;'
246 cond_check = "checkCondition(ccFlagBits | cfofBits | dfBit | \
247 ecfBit | ezfBit, src2)"
248
221 class Xorfp(FpOp):
249 class Xorfp(FpBinaryOp):
222 code = 'FpDestReg_uqw = FpSrcReg1_uqw ^ FpSrcReg2_uqw;'
223
250 code = 'FpDestReg_uqw = FpSrcReg1_uqw ^ FpSrcReg2_uqw;'
251
224 class Sqrtfp(FpOp):
252 class Sqrtfp(FpBinaryOp):
225 code = 'FpDestReg = sqrt(FpSrcReg2);'
226
253 code = 'FpDestReg = sqrt(FpSrcReg2);'
254
255 class Cosfp(FpUnaryOp):
256 code = 'FpDestReg = cos(FpSrcReg1);'
257
258 class Sinfp(FpUnaryOp):
259 code = 'FpDestReg = sin(FpSrcReg1);'
260
261
227 # Conversion microops
262 # Conversion microops
228 class ConvOp(FpOp):
263 class ConvOp(FpBinaryOp):
229 abstract = True
230 def __init__(self, dest, src1):
231 super(ConvOp, self).__init__(dest, src1, \
232 "InstRegIndex(FLOATREG_MICROFP0)")
233
234 # These probably shouldn't look at the ExtMachInst directly to figure
235 # out what size to use and should instead delegate that to the macroop's
236 # constructor. That would be more efficient, and it would make the

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253 if (REX_W)
254 SDestReg = intSrcReg1;
255 else
256 SDestReg = merge(SDestReg, intSrcReg1, 4);
257 '''
258
259 # These need to consider size at some point. They'll always use doubles
260 # for the moment.
264 abstract = True
265 def __init__(self, dest, src1):
266 super(ConvOp, self).__init__(dest, src1, \
267 "InstRegIndex(FLOATREG_MICROFP0)")
268
269 # These probably shouldn't look at the ExtMachInst directly to figure
270 # out what size to use and should instead delegate that to the macroop's
271 # constructor. That would be more efficient, and it would make the

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288 if (REX_W)
289 SDestReg = intSrcReg1;
290 else
291 SDestReg = merge(SDestReg, intSrcReg1, 4);
292 '''
293
294 # These need to consider size at some point. They'll always use doubles
295 # for the moment.
261 class addfp(FpOp):
296 class addfp(FpBinaryOp):
262 code = 'FpDestReg = FpSrcReg1 + FpSrcReg2;'
263
297 code = 'FpDestReg = FpSrcReg1 + FpSrcReg2;'
298
264 class mulfp(FpOp):
299 class mulfp(FpBinaryOp):
265 code = 'FpDestReg = FpSrcReg1 * FpSrcReg2;'
266
300 code = 'FpDestReg = FpSrcReg1 * FpSrcReg2;'
301
267 class divfp(FpOp):
302 class divfp(FpBinaryOp):
268 code = 'FpDestReg = FpSrcReg1 / FpSrcReg2;'
269
303 code = 'FpDestReg = FpSrcReg1 / FpSrcReg2;'
304
270 class subfp(FpOp):
305 class subfp(FpBinaryOp):
271 code = 'FpDestReg = FpSrcReg1 - FpSrcReg2;'
272
306 code = 'FpDestReg = FpSrcReg1 - FpSrcReg2;'
307
273 class Compfp(FpOp):
308 class Compfp(FpBinaryOp):
274 def __init__(self, src1, src2, spm=0, setStatus=False, \
275 dataSize="env.dataSize"):
276 super(Compfp, self).__init__("InstRegIndex(FLOATREG_MICROFP0)", \
277 src1, src2, spm, setStatus, dataSize)
278 # This class sets the condition codes in rflags according to the
279 # rules for comparing floating point.
280 code = '''
281 // ZF PF CF

--- 18 unchanged lines hidden --- 		309 def __init__(self, src1, src2, spm=0, setStatus=False, \
310 dataSize="env.dataSize"):
311 super(Compfp, self).__init__("InstRegIndex(FLOATREG_MICROFP0)", \
312 src1, src2, spm, setStatus, dataSize)
313 # This class sets the condition codes in rflags according to the
314 # rules for comparing floating point.
315 code = '''
316 // ZF PF CF

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