fpop.isa (5788:6d4161a36ca1) fpop.isa (6345:f9ae7c3a036c)
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// Redistribution and use of this software in source and binary forms,
5// with or without modification, are permitted provided that the
6// following conditions are met:
7//
8// The software must be used only for Non-Commercial Use which means any

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94 {
95 protected:
96 void buildMe();
97
98 public:
99 %(class_name)s(ExtMachInst _machInst,
100 const char * instMnem,
101 bool isMicro, bool isDelayed, bool isFirst, bool isLast,
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// Redistribution and use of this software in source and binary forms,
5// with or without modification, are permitted provided that the
6// following conditions are met:
7//
8// The software must be used only for Non-Commercial Use which means any

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94 {
95 protected:
96 void buildMe();
97
98 public:
99 %(class_name)s(ExtMachInst _machInst,
100 const char * instMnem,
101 bool isMicro, bool isDelayed, bool isFirst, bool isLast,
102 RegIndex _src1, RegIndex _src2, RegIndex _dest,
102 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
103 uint8_t _dataSize, int8_t _spm);
104
105 %(class_name)s(ExtMachInst _machInst,
106 const char * instMnem,
103 uint8_t _dataSize, int8_t _spm);
104
105 %(class_name)s(ExtMachInst _machInst,
106 const char * instMnem,
107 RegIndex _src1, RegIndex _src2, RegIndex _dest,
107 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
108 uint8_t _dataSize, int8_t _spm);
109
110 %(BasicExecDeclare)s
111 };
112}};
113
114def template MicroFpOpConstructor {{
115
116 inline void %(class_name)s::buildMe()
117 {
118 %(constructor)s;
119 }
120
121 inline %(class_name)s::%(class_name)s(
122 ExtMachInst machInst, const char * instMnem,
108 uint8_t _dataSize, int8_t _spm);
109
110 %(BasicExecDeclare)s
111 };
112}};
113
114def template MicroFpOpConstructor {{
115
116 inline void %(class_name)s::buildMe()
117 {
118 %(constructor)s;
119 }
120
121 inline %(class_name)s::%(class_name)s(
122 ExtMachInst machInst, const char * instMnem,
123 RegIndex _src1, RegIndex _src2, RegIndex _dest,
123 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
124 uint8_t _dataSize, int8_t _spm) :
125 %(base_class)s(machInst, "%(mnemonic)s", instMnem,
126 false, false, false, false,
127 _src1, _src2, _dest, _dataSize, _spm,
128 %(op_class)s)
129 {
130 buildMe();
131 }
132
133 inline %(class_name)s::%(class_name)s(
134 ExtMachInst machInst, const char * instMnem,
135 bool isMicro, bool isDelayed, bool isFirst, bool isLast,
124 uint8_t _dataSize, int8_t _spm) :
125 %(base_class)s(machInst, "%(mnemonic)s", instMnem,
126 false, false, false, false,
127 _src1, _src2, _dest, _dataSize, _spm,
128 %(op_class)s)
129 {
130 buildMe();
131 }
132
133 inline %(class_name)s::%(class_name)s(
134 ExtMachInst machInst, const char * instMnem,
135 bool isMicro, bool isDelayed, bool isFirst, bool isLast,
136 RegIndex _src1, RegIndex _src2, RegIndex _dest,
136 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
137 uint8_t _dataSize, int8_t _spm) :
138 %(base_class)s(machInst, "%(mnemonic)s", instMnem,
139 isMicro, isDelayed, isFirst, isLast,
140 _src1, _src2, _dest, _dataSize, _spm,
141 %(op_class)s)
142 {
143 buildMe();
144 }

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251 "class_name" : self.className,
252 "flags" : self.microFlagsText(microFlags),
253 "src1" : self.src1, "src2" : self.src2,
254 "dest" : self.dest,
255 "dataSize" : self.dataSize,
256 "spm" : self.spm}
257
258 class Movfp(FpOp):
137 uint8_t _dataSize, int8_t _spm) :
138 %(base_class)s(machInst, "%(mnemonic)s", instMnem,
139 isMicro, isDelayed, isFirst, isLast,
140 _src1, _src2, _dest, _dataSize, _spm,
141 %(op_class)s)
142 {
143 buildMe();
144 }

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251 "class_name" : self.className,
252 "flags" : self.microFlagsText(microFlags),
253 "src1" : self.src1, "src2" : self.src2,
254 "dest" : self.dest,
255 "dataSize" : self.dataSize,
256 "spm" : self.spm}
257
258 class Movfp(FpOp):
259 def __init__(self, dest, src1, flags=0, spm=0, \
259 def __init__(self, dest, src1, spm=0, \
260 SetStatus=False, dataSize="env.dataSize"):
260 SetStatus=False, dataSize="env.dataSize"):
261 super(Movfp, self).__init__(dest, src1, flags, \
261 super(Movfp, self).__init__(dest, src1, "InstRegIndex(0)", \
262 spm, SetStatus, dataSize)
263 code = 'FpDestReg.uqw = FpSrcReg1.uqw;'
264 else_code = 'FpDestReg.uqw = FpDestReg.uqw;'
265 cond_check = "checkCondition(ccFlagBits, src2)"
266
267 class Xorfp(FpOp):
268 code = 'FpDestReg.uqw = FpSrcReg1.uqw ^ FpSrcReg2.uqw;'
269
270 class Sqrtfp(FpOp):
271 code = 'FpDestReg = sqrt(FpSrcReg2);'
272
273 # Conversion microops
274 class ConvOp(FpOp):
275 abstract = True
276 def __init__(self, dest, src1):
262 spm, SetStatus, dataSize)
263 code = 'FpDestReg.uqw = FpSrcReg1.uqw;'
264 else_code = 'FpDestReg.uqw = FpDestReg.uqw;'
265 cond_check = "checkCondition(ccFlagBits, src2)"
266
267 class Xorfp(FpOp):
268 code = 'FpDestReg.uqw = FpSrcReg1.uqw ^ FpSrcReg2.uqw;'
269
270 class Sqrtfp(FpOp):
271 code = 'FpDestReg = sqrt(FpSrcReg2);'
272
273 # Conversion microops
274 class ConvOp(FpOp):
275 abstract = True
276 def __init__(self, dest, src1):
277 super(ConvOp, self).__init__(dest, src1, "(int)FLOATREG_MICROFP0")
277 super(ConvOp, self).__init__(dest, src1, \
278 "InstRegIndex(FLOATREG_MICROFP0)")
278
279 # These probably shouldn't look at the ExtMachInst directly to figure
280 # out what size to use and should instead delegate that to the macroop's
281 # constructor. That would be more efficient, and it would make the
282 # microops a little more modular.
283 class cvtf_i2d(ConvOp):
284 code = '''
285 X86IntReg intReg = SSrcReg1;

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313 code = 'FpDestReg = FpSrcReg1 / FpSrcReg2;'
314
315 class subfp(FpOp):
316 code = 'FpDestReg = FpSrcReg1 - FpSrcReg2;'
317
318 class Compfp(FpOp):
319 def __init__(self, src1, src2, spm=0, setStatus=False, \
320 dataSize="env.dataSize"):
279
280 # These probably shouldn't look at the ExtMachInst directly to figure
281 # out what size to use and should instead delegate that to the macroop's
282 # constructor. That would be more efficient, and it would make the
283 # microops a little more modular.
284 class cvtf_i2d(ConvOp):
285 code = '''
286 X86IntReg intReg = SSrcReg1;

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314 code = 'FpDestReg = FpSrcReg1 / FpSrcReg2;'
315
316 class subfp(FpOp):
317 code = 'FpDestReg = FpSrcReg1 - FpSrcReg2;'
318
319 class Compfp(FpOp):
320 def __init__(self, src1, src2, spm=0, setStatus=False, \
321 dataSize="env.dataSize"):
321 super(Compfp, self).__init__("(int)FLOATREG_MICROFP0", \
322 super(Compfp, self).__init__("InstRegIndex(FLOATREG_MICROFP0)", \
322 src1, src2, spm, setStatus, dataSize)
323 # This class sets the condition codes in rflags according to the
324 # rules for comparing floating point.
325 code = '''
326 // ZF PF CF
327 // Unordered 1 1 1
328 // Greater than 0 0 0
329 // Less than 0 0 1

--- 12 unchanged lines hidden --- 		323 src1, src2, spm, setStatus, dataSize)
324 # This class sets the condition codes in rflags according to the
325 # rules for comparing floating point.
326 code = '''
327 // ZF PF CF
328 // Unordered 1 1 1
329 // Greater than 0 0 0
330 // Less than 0 0 1

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