fpop.isa (9211:46c3a74952ec) fpop.isa (9371:7c1484cc9b10)
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license
9// terms below provided that you ensure that this notice is replicated
10// unmodified and in its entirety in all distributions of the software,
11// modified or unmodified, in source code or in binary form.
12//
13// Redistribution and use in source and binary forms, with or without
14// modification, are permitted provided that the following conditions are
15// met: redistributions of source code must retain the above copyright
16// notice, this list of conditions and the following disclaimer;
17// redistributions in binary form must reproduce the above copyright
18// notice, this list of conditions and the following disclaimer in the
19// documentation and/or other materials provided with the distribution;
20// neither the name of the copyright holders nor the names of its
21// contributors may be used to endorse or promote products derived from
22// this software without specific prior written permission.
23//
24// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35//
36// Authors: Gabe Black
37
38//////////////////////////////////////////////////////////////////////////
39//
40// FpOp Microop templates
41//
42//////////////////////////////////////////////////////////////////////////
43
44def template MicroFpOpExecute {{
45 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
46 Trace::InstRecord *traceData) const
47 {
48 Fault fault = NoFault;
49
50 DPRINTF(X86, "The data size is %d\n", dataSize);
51 %(op_decl)s;
52 %(op_rd)s;
53
54 if(%(cond_check)s)
55 {
56 %(code)s;
57 %(flag_code)s;
58 %(top_code)s;
59 }
60 else
61 {
62 %(else_code)s;
63 }
64
65 //Write the resulting state to the execution context
66 if(fault == NoFault)
67 {
68 %(op_wb)s;
69 }
70 return fault;
71 }
72}};
73
74def template MicroFpOpDeclare {{
75 class %(class_name)s : public %(base_class)s
76 {
77 public:
78 %(class_name)s(ExtMachInst _machInst,
79 const char * instMnem, uint64_t setFlags,
80 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
81 uint8_t _dataSize, int8_t _spm);
82
83 %(BasicExecDeclare)s
84 };
85}};
86
87def template MicroFpOpConstructor {{
88 inline %(class_name)s::%(class_name)s(
89 ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
90 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
91 uint8_t _dataSize, int8_t _spm) :
92 %(base_class)s(machInst, "%(mnemonic)s", instMnem, setFlags,
93 _src1, _src2, _dest, _dataSize, _spm,
94 %(op_class)s)
95 {
96 %(constructor)s;
97 }
98}};
99
100let {{
101 # Make these empty strings so that concatenating onto
102 # them will always work.
103 header_output = ""
104 decoder_output = ""
105 exec_output = ""
106
107 class FpOpMeta(type):
108 def buildCppClasses(self, name, Name, suffix, \
109 code, flag_code, cond_check, else_code):
110
111 # Globals to stick the output in
112 global header_output
113 global decoder_output
114 global exec_output
115
116 # Stick all the code together so it can be searched at once
117 allCode = "|".join((code, flag_code, cond_check, else_code))
118
119 # If there's something optional to do with flags, generate
120 # a version without it and fix up this version to use it.
121 if flag_code is not "" or cond_check is not "true":
122 self.buildCppClasses(name, Name, suffix,
123 code, "", "true", else_code)
124 suffix = "Flags" + suffix
125
126 base = "X86ISA::FpOp"
127
128 # Get everything ready for the substitution
129 iop_top = InstObjParams(name, Name + suffix + "Top", base,
130 {"code" : code,
131 "flag_code" : flag_code,
132 "cond_check" : cond_check,
133 "else_code" : else_code,
134 "top_code" : "TOP = (TOP + spm + 8) % 8;"})
135 iop = InstObjParams(name, Name + suffix, base,
136 {"code" : code,
137 "flag_code" : flag_code,
138 "cond_check" : cond_check,
139 "else_code" : else_code,
140 "top_code" : ";"})
141
142 # Generate the actual code (finally!)
143 header_output += MicroFpOpDeclare.subst(iop_top)
144 decoder_output += MicroFpOpConstructor.subst(iop_top)
145 exec_output += MicroFpOpExecute.subst(iop_top)
146 header_output += MicroFpOpDeclare.subst(iop)
147 decoder_output += MicroFpOpConstructor.subst(iop)
148 exec_output += MicroFpOpExecute.subst(iop)
149
150
151 def __new__(mcls, Name, bases, dict):
152 abstract = False
153 name = Name.lower()
154 if "abstract" in dict:
155 abstract = dict['abstract']
156 del dict['abstract']
157
158 cls = super(FpOpMeta, mcls).__new__(mcls, Name, bases, dict)
159 if not abstract:
160 cls.className = Name
161 cls.mnemonic = name
162 code = cls.code
163 flag_code = cls.flag_code
164 cond_check = cls.cond_check
165 else_code = cls.else_code
166
167 # Set up the C++ classes
168 mcls.buildCppClasses(cls, name, Name, "",
169 code, flag_code, cond_check, else_code)
170
171 # Hook into the microassembler dict
172 global microopClasses
173 microopClasses[name] = cls
174
175 return cls
176
1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license
9// terms below provided that you ensure that this notice is replicated
10// unmodified and in its entirety in all distributions of the software,
11// modified or unmodified, in source code or in binary form.
12//
13// Redistribution and use in source and binary forms, with or without
14// modification, are permitted provided that the following conditions are
15// met: redistributions of source code must retain the above copyright
16// notice, this list of conditions and the following disclaimer;
17// redistributions in binary form must reproduce the above copyright
18// notice, this list of conditions and the following disclaimer in the
19// documentation and/or other materials provided with the distribution;
20// neither the name of the copyright holders nor the names of its
21// contributors may be used to endorse or promote products derived from
22// this software without specific prior written permission.
23//
24// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35//
36// Authors: Gabe Black
37
38//////////////////////////////////////////////////////////////////////////
39//
40// FpOp Microop templates
41//
42//////////////////////////////////////////////////////////////////////////
43
44def template MicroFpOpExecute {{
45 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
46 Trace::InstRecord *traceData) const
47 {
48 Fault fault = NoFault;
49
50 DPRINTF(X86, "The data size is %d\n", dataSize);
51 %(op_decl)s;
52 %(op_rd)s;
53
54 if(%(cond_check)s)
55 {
56 %(code)s;
57 %(flag_code)s;
58 %(top_code)s;
59 }
60 else
61 {
62 %(else_code)s;
63 }
64
65 //Write the resulting state to the execution context
66 if(fault == NoFault)
67 {
68 %(op_wb)s;
69 }
70 return fault;
71 }
72}};
73
74def template MicroFpOpDeclare {{
75 class %(class_name)s : public %(base_class)s
76 {
77 public:
78 %(class_name)s(ExtMachInst _machInst,
79 const char * instMnem, uint64_t setFlags,
80 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
81 uint8_t _dataSize, int8_t _spm);
82
83 %(BasicExecDeclare)s
84 };
85}};
86
87def template MicroFpOpConstructor {{
88 inline %(class_name)s::%(class_name)s(
89 ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
90 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
91 uint8_t _dataSize, int8_t _spm) :
92 %(base_class)s(machInst, "%(mnemonic)s", instMnem, setFlags,
93 _src1, _src2, _dest, _dataSize, _spm,
94 %(op_class)s)
95 {
96 %(constructor)s;
97 }
98}};
99
100let {{
101 # Make these empty strings so that concatenating onto
102 # them will always work.
103 header_output = ""
104 decoder_output = ""
105 exec_output = ""
106
107 class FpOpMeta(type):
108 def buildCppClasses(self, name, Name, suffix, \
109 code, flag_code, cond_check, else_code):
110
111 # Globals to stick the output in
112 global header_output
113 global decoder_output
114 global exec_output
115
116 # Stick all the code together so it can be searched at once
117 allCode = "|".join((code, flag_code, cond_check, else_code))
118
119 # If there's something optional to do with flags, generate
120 # a version without it and fix up this version to use it.
121 if flag_code is not "" or cond_check is not "true":
122 self.buildCppClasses(name, Name, suffix,
123 code, "", "true", else_code)
124 suffix = "Flags" + suffix
125
126 base = "X86ISA::FpOp"
127
128 # Get everything ready for the substitution
129 iop_top = InstObjParams(name, Name + suffix + "Top", base,
130 {"code" : code,
131 "flag_code" : flag_code,
132 "cond_check" : cond_check,
133 "else_code" : else_code,
134 "top_code" : "TOP = (TOP + spm + 8) % 8;"})
135 iop = InstObjParams(name, Name + suffix, base,
136 {"code" : code,
137 "flag_code" : flag_code,
138 "cond_check" : cond_check,
139 "else_code" : else_code,
140 "top_code" : ";"})
141
142 # Generate the actual code (finally!)
143 header_output += MicroFpOpDeclare.subst(iop_top)
144 decoder_output += MicroFpOpConstructor.subst(iop_top)
145 exec_output += MicroFpOpExecute.subst(iop_top)
146 header_output += MicroFpOpDeclare.subst(iop)
147 decoder_output += MicroFpOpConstructor.subst(iop)
148 exec_output += MicroFpOpExecute.subst(iop)
149
150
151 def __new__(mcls, Name, bases, dict):
152 abstract = False
153 name = Name.lower()
154 if "abstract" in dict:
155 abstract = dict['abstract']
156 del dict['abstract']
157
158 cls = super(FpOpMeta, mcls).__new__(mcls, Name, bases, dict)
159 if not abstract:
160 cls.className = Name
161 cls.mnemonic = name
162 code = cls.code
163 flag_code = cls.flag_code
164 cond_check = cls.cond_check
165 else_code = cls.else_code
166
167 # Set up the C++ classes
168 mcls.buildCppClasses(cls, name, Name, "",
169 code, flag_code, cond_check, else_code)
170
171 # Hook into the microassembler dict
172 global microopClasses
173 microopClasses[name] = cls
174
175 return cls
176
177 class FpUnaryOp(X86Microop):
178 __metaclass__ = FpOpMeta
179 # This class itself doesn't act as a microop
180 abstract = True
177
181
178 class FpOp(X86Microop):
182 # Default template parameter values
183 flag_code = ""
184 cond_check = "true"
185 else_code = ";"
186
187 def __init__(self, dest, src1, spm=0, \
188 SetStatus=False, dataSize="env.dataSize"):
189 self.dest = dest
190 self.src1 = src1
191 self.src2 = "InstRegIndex(0)"
192 self.spm = spm
193 self.dataSize = dataSize
194 if SetStatus:
195 self.className += "Flags"
196 if spm:
197 self.className += "Top"
198
199 def getAllocator(self, microFlags):
200 return '''new %(class_name)s(machInst, macrocodeBlock,
201 %(flags)s, %(src1)s, %(src2)s, %(dest)s,
202 %(dataSize)s, %(spm)d)''' % {
203 "class_name" : self.className,
204 "flags" : self.microFlagsText(microFlags),
205 "src1" : self.src1, "src2" : self.src2,
206 "dest" : self.dest,
207 "dataSize" : self.dataSize,
208 "spm" : self.spm}
209
210 class FpBinaryOp(X86Microop):
179 __metaclass__ = FpOpMeta
180 # This class itself doesn't act as a microop
181 abstract = True
182
183 # Default template parameter values
184 flag_code = ""
185 cond_check = "true"
186 else_code = ";"
187
188 def __init__(self, dest, src1, src2, spm=0, \
189 SetStatus=False, dataSize="env.dataSize"):
190 self.dest = dest
191 self.src1 = src1
192 self.src2 = src2
193 self.spm = spm
194 self.dataSize = dataSize
195 if SetStatus:
196 self.className += "Flags"
197 if spm:
198 self.className += "Top"
199
200 def getAllocator(self, microFlags):
201 return '''new %(class_name)s(machInst, macrocodeBlock,
202 %(flags)s, %(src1)s, %(src2)s, %(dest)s,
203 %(dataSize)s, %(spm)d)''' % {
204 "class_name" : self.className,
205 "flags" : self.microFlagsText(microFlags),
206 "src1" : self.src1, "src2" : self.src2,
207 "dest" : self.dest,
208 "dataSize" : self.dataSize,
209 "spm" : self.spm}
210
211 __metaclass__ = FpOpMeta
212 # This class itself doesn't act as a microop
213 abstract = True
214
215 # Default template parameter values
216 flag_code = ""
217 cond_check = "true"
218 else_code = ";"
219
220 def __init__(self, dest, src1, src2, spm=0, \
221 SetStatus=False, dataSize="env.dataSize"):
222 self.dest = dest
223 self.src1 = src1
224 self.src2 = src2
225 self.spm = spm
226 self.dataSize = dataSize
227 if SetStatus:
228 self.className += "Flags"
229 if spm:
230 self.className += "Top"
231
232 def getAllocator(self, microFlags):
233 return '''new %(class_name)s(machInst, macrocodeBlock,
234 %(flags)s, %(src1)s, %(src2)s, %(dest)s,
235 %(dataSize)s, %(spm)d)''' % {
236 "class_name" : self.className,
237 "flags" : self.microFlagsText(microFlags),
238 "src1" : self.src1, "src2" : self.src2,
239 "dest" : self.dest,
240 "dataSize" : self.dataSize,
241 "spm" : self.spm}
242
211 class Movfp(FpOp):
212 def __init__(self, dest, src1, spm=0, \
213 SetStatus=False, dataSize="env.dataSize"):
214 super(Movfp, self).__init__(dest, src1, "InstRegIndex(0)", \
215 spm, SetStatus, dataSize)
243 class Movfp(FpUnaryOp):
216 code = 'FpDestReg_uqw = FpSrcReg1_uqw;'
217 else_code = 'FpDestReg_uqw = FpDestReg_uqw;'
218 cond_check = "checkCondition(ccFlagBits | cfofBits | dfBit | \
219 ecfBit | ezfBit, src2)"
220
244 code = 'FpDestReg_uqw = FpSrcReg1_uqw;'
245 else_code = 'FpDestReg_uqw = FpDestReg_uqw;'
246 cond_check = "checkCondition(ccFlagBits | cfofBits | dfBit | \
247 ecfBit | ezfBit, src2)"
248
221 class Xorfp(FpOp):
249 class Xorfp(FpBinaryOp):
222 code = 'FpDestReg_uqw = FpSrcReg1_uqw ^ FpSrcReg2_uqw;'
223
250 code = 'FpDestReg_uqw = FpSrcReg1_uqw ^ FpSrcReg2_uqw;'
251
224 class Sqrtfp(FpOp):
252 class Sqrtfp(FpBinaryOp):
225 code = 'FpDestReg = sqrt(FpSrcReg2);'
226
253 code = 'FpDestReg = sqrt(FpSrcReg2);'
254
255 class Cosfp(FpUnaryOp):
256 code = 'FpDestReg = cos(FpSrcReg1);'
257
258 class Sinfp(FpUnaryOp):
259 code = 'FpDestReg = sin(FpSrcReg1);'
260
261
227 # Conversion microops
262 # Conversion microops
228 class ConvOp(FpOp):
263 class ConvOp(FpBinaryOp):
229 abstract = True
230 def __init__(self, dest, src1):
231 super(ConvOp, self).__init__(dest, src1, \
232 "InstRegIndex(FLOATREG_MICROFP0)")
233
234 # These probably shouldn't look at the ExtMachInst directly to figure
235 # out what size to use and should instead delegate that to the macroop's
236 # constructor. That would be more efficient, and it would make the
237 # microops a little more modular.
238 class cvtf_i2d(ConvOp):
239 code = '''
240 X86IntReg intReg = SSrcReg1;
241 if (REX_W)
242 FpDestReg = intReg.SR;
243 else
244 FpDestReg = intReg.SE;
245 '''
246
247 class cvtf_i2d_hi(ConvOp):
248 code = 'FpDestReg = bits(SSrcReg1, 63, 32);'
249
250 class cvtf_d2i(ConvOp):
251 code = '''
252 int64_t intSrcReg1 = static_cast<int64_t>(FpSrcReg1);
253 if (REX_W)
254 SDestReg = intSrcReg1;
255 else
256 SDestReg = merge(SDestReg, intSrcReg1, 4);
257 '''
258
259 # These need to consider size at some point. They'll always use doubles
260 # for the moment.
264 abstract = True
265 def __init__(self, dest, src1):
266 super(ConvOp, self).__init__(dest, src1, \
267 "InstRegIndex(FLOATREG_MICROFP0)")
268
269 # These probably shouldn't look at the ExtMachInst directly to figure
270 # out what size to use and should instead delegate that to the macroop's
271 # constructor. That would be more efficient, and it would make the
272 # microops a little more modular.
273 class cvtf_i2d(ConvOp):
274 code = '''
275 X86IntReg intReg = SSrcReg1;
276 if (REX_W)
277 FpDestReg = intReg.SR;
278 else
279 FpDestReg = intReg.SE;
280 '''
281
282 class cvtf_i2d_hi(ConvOp):
283 code = 'FpDestReg = bits(SSrcReg1, 63, 32);'
284
285 class cvtf_d2i(ConvOp):
286 code = '''
287 int64_t intSrcReg1 = static_cast<int64_t>(FpSrcReg1);
288 if (REX_W)
289 SDestReg = intSrcReg1;
290 else
291 SDestReg = merge(SDestReg, intSrcReg1, 4);
292 '''
293
294 # These need to consider size at some point. They'll always use doubles
295 # for the moment.
261 class addfp(FpOp):
296 class addfp(FpBinaryOp):
262 code = 'FpDestReg = FpSrcReg1 + FpSrcReg2;'
263
297 code = 'FpDestReg = FpSrcReg1 + FpSrcReg2;'
298
264 class mulfp(FpOp):
299 class mulfp(FpBinaryOp):
265 code = 'FpDestReg = FpSrcReg1 * FpSrcReg2;'
266
300 code = 'FpDestReg = FpSrcReg1 * FpSrcReg2;'
301
267 class divfp(FpOp):
302 class divfp(FpBinaryOp):
268 code = 'FpDestReg = FpSrcReg1 / FpSrcReg2;'
269
303 code = 'FpDestReg = FpSrcReg1 / FpSrcReg2;'
304
270 class subfp(FpOp):
305 class subfp(FpBinaryOp):
271 code = 'FpDestReg = FpSrcReg1 - FpSrcReg2;'
272
306 code = 'FpDestReg = FpSrcReg1 - FpSrcReg2;'
307
273 class Compfp(FpOp):
308 class Compfp(FpBinaryOp):
274 def __init__(self, src1, src2, spm=0, setStatus=False, \
275 dataSize="env.dataSize"):
276 super(Compfp, self).__init__("InstRegIndex(FLOATREG_MICROFP0)", \
277 src1, src2, spm, setStatus, dataSize)
278 # This class sets the condition codes in rflags according to the
279 # rules for comparing floating point.
280 code = '''
281 // ZF PF CF
282 // Unordered 1 1 1
283 // Greater than 0 0 0
284 // Less than 0 0 1
285 // Equal 1 0 0
286 // OF = SF = AF = 0
287 ccFlagBits = ccFlagBits & ~(SFBit | AFBit | ZFBit | PFBit);
288 cfofBits = cfofBits & ~(OFBit | CFBit);
289
290 if (std::isnan(FpSrcReg1) || std::isnan(FpSrcReg2)) {
291 ccFlagBits = ccFlagBits | (ZFBit | PFBit);
292 cfofBits = cfofBits | CFBit;
293 }
294 else if(FpSrcReg1 < FpSrcReg2)
295 cfofBits = cfofBits | CFBit;
296 else if(FpSrcReg1 == FpSrcReg2)
297 ccFlagBits = ccFlagBits | ZFBit;
298 '''
299}};
309 def __init__(self, src1, src2, spm=0, setStatus=False, \
310 dataSize="env.dataSize"):
311 super(Compfp, self).__init__("InstRegIndex(FLOATREG_MICROFP0)", \
312 src1, src2, spm, setStatus, dataSize)
313 # This class sets the condition codes in rflags according to the
314 # rules for comparing floating point.
315 code = '''
316 // ZF PF CF
317 // Unordered 1 1 1
318 // Greater than 0 0 0
319 // Less than 0 0 1
320 // Equal 1 0 0
321 // OF = SF = AF = 0
322 ccFlagBits = ccFlagBits & ~(SFBit | AFBit | ZFBit | PFBit);
323 cfofBits = cfofBits & ~(OFBit | CFBit);
324
325 if (std::isnan(FpSrcReg1) || std::isnan(FpSrcReg2)) {
326 ccFlagBits = ccFlagBits | (ZFBit | PFBit);
327 cfofBits = cfofBits | CFBit;
328 }
329 else if(FpSrcReg1 < FpSrcReg2)
330 cfofBits = cfofBits | CFBit;
331 else if(FpSrcReg1 == FpSrcReg2)
332 ccFlagBits = ccFlagBits | ZFBit;
333 '''
334}};