1// Copyright (c) 2007 The Hewlett-Packard Development Company
2// Copyright (c) 2012-2013 Mark D. Hill and David A. Wood
3// All rights reserved.
4//
5// The license below extends only to copyright in the software and shall
6// not be construed as granting a license to any other intellectual
7// property including but not limited to intellectual property relating
8// to a hardware implementation of the functionality of the software
9// licensed hereunder. You may use the software subject to the license
10// terms below provided that you ensure that this notice is replicated
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12// modified or unmodified, in source code or in binary form.
13//
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15// modification, are permitted provided that the following conditions are
16// met: redistributions of source code must retain the above copyright
17// notice, this list of conditions and the following disclaimer;
18// redistributions in binary form must reproduce the above copyright
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20// documentation and/or other materials provided with the distribution;
21// neither the name of the copyright holders nor the names of its
22// contributors may be used to endorse or promote products derived from
23// this software without specific prior written permission.
24//
25// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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35// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36//
37// Authors: Gabe Black
38// Nilay Vaish
39
40//////////////////////////////////////////////////////////////////////////
41//
42// FpOp Microop templates
43//
44//////////////////////////////////////////////////////////////////////////
45
46def template MicroFpOpExecute {{
47 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
48 Trace::InstRecord *traceData) const
49 {
50 Fault fault = NoFault;
51
52 DPRINTF(X86, "The data size is %d\n", dataSize);
53 %(op_decl)s;
54 %(op_rd)s;
55
56 if(%(cond_check)s)
57 {
58 %(code)s;
59 %(flag_code)s;
60 %(top_code)s;
61 }
62 else
63 {
64 %(else_code)s;
65 }
66
67 //Write the resulting state to the execution context
68 if(fault == NoFault)
69 {
70 %(op_wb)s;
71 }
72 return fault;
73 }
74}};
75
76def template MicroFpOpDeclare {{
77 class %(class_name)s : public %(base_class)s
78 {
79 public:
80 %(class_name)s(ExtMachInst _machInst,
81 const char * instMnem, uint64_t setFlags,
82 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
83 uint8_t _dataSize, int8_t _spm);
84
85 %(BasicExecDeclare)s
86 };
87}};
88
89def template MicroFpOpConstructor {{
90 inline %(class_name)s::%(class_name)s(
91 ExtMachInst machInst, const char * instMnem, uint64_t setFlags,
92 InstRegIndex _src1, InstRegIndex _src2, InstRegIndex _dest,
93 uint8_t _dataSize, int8_t _spm) :
94 %(base_class)s(machInst, "%(mnemonic)s", instMnem, setFlags,
95 _src1, _src2, _dest, _dataSize, _spm,
96 %(op_class)s)
97 {
98 %(constructor)s;
99 }
100}};
101
102let {{
103 # Make these empty strings so that concatenating onto
104 # them will always work.
105 header_output = ""
106 decoder_output = ""
107 exec_output = ""
108
109 class FpOpMeta(type):
110 def buildCppClasses(self, name, Name, suffix, \
111 code, flag_code, cond_check, else_code, op_class):
112
113 # Globals to stick the output in
114 global header_output
115 global decoder_output
116 global exec_output
117
118 # Stick all the code together so it can be searched at once
119 allCode = "|".join((code, flag_code, cond_check, else_code))
120
121 # If there's something optional to do with flags, generate
122 # a version without it and fix up this version to use it.
123 if flag_code is not "" or cond_check is not "true":
124 self.buildCppClasses(name, Name, suffix,
125 code, "", "true", else_code, op_class)
126 suffix = "Flags" + suffix
127
128 base = "X86ISA::FpOp"
129
130 # Get everything ready for the substitution
131 iop_top = InstObjParams(name, Name + suffix + "Top", base,
132 {"code" : code,
133 "flag_code" : flag_code,
134 "cond_check" : cond_check,
135 "else_code" : else_code,
136 "top_code" : "TOP = (TOP + spm + 8) % 8;",
137 "op_class" : op_class})
138 iop = InstObjParams(name, Name + suffix, base,
139 {"code" : code,
140 "flag_code" : flag_code,
141 "cond_check" : cond_check,
142 "else_code" : else_code,
143 "top_code" : ";",
144 "op_class" : op_class})
145
146 # Generate the actual code (finally!)
147 header_output += MicroFpOpDeclare.subst(iop_top)
148 decoder_output += MicroFpOpConstructor.subst(iop_top)
149 exec_output += MicroFpOpExecute.subst(iop_top)
150 header_output += MicroFpOpDeclare.subst(iop)
151 decoder_output += MicroFpOpConstructor.subst(iop)
152 exec_output += MicroFpOpExecute.subst(iop)
153
154
155 def __new__(mcls, Name, bases, dict):
156 abstract = False
157 name = Name.lower()
158 if "abstract" in dict:
159 abstract = dict['abstract']
160 del dict['abstract']
161
162 cls = super(FpOpMeta, mcls).__new__(mcls, Name, bases, dict)
163 if not abstract:
164 cls.className = Name
165 cls.mnemonic = name
166 code = cls.code
167 flag_code = cls.flag_code
168 cond_check = cls.cond_check
169 else_code = cls.else_code
170 op_class = cls.op_class
171
172 # Set up the C++ classes
173 mcls.buildCppClasses(cls, name, Name, "",
174 code, flag_code, cond_check, else_code, op_class)
175
176 # Hook into the microassembler dict
177 global microopClasses
178 microopClasses[name] = cls
179
180 return cls
181
182 class FpUnaryOp(X86Microop):
183 __metaclass__ = FpOpMeta
184 # This class itself doesn't act as a microop
185 abstract = True
186
187 # Default template parameter values
188 flag_code = ""
189 cond_check = "true"
190 else_code = ";"
191 op_class = "FloatAddOp"
192
193 def __init__(self, dest, src1, spm=0, \
194 SetStatus=False, dataSize="env.dataSize"):
195 self.dest = dest
196 self.src1 = src1
197 self.src2 = "InstRegIndex(0)"
198 self.spm = spm
199 self.dataSize = dataSize
200 if SetStatus:
201 self.className += "Flags"
202 if spm:
203 self.className += "Top"
204
205 def getAllocator(self, microFlags):
206 return '''new %(class_name)s(machInst, macrocodeBlock,
207 %(flags)s, %(src1)s, %(src2)s, %(dest)s,
208 %(dataSize)s, %(spm)d)''' % {
209 "class_name" : self.className,
210 "flags" : self.microFlagsText(microFlags),
211 "src1" : self.src1, "src2" : self.src2,
212 "dest" : self.dest,
213 "dataSize" : self.dataSize,
214 "spm" : self.spm}
215
216 class FpBinaryOp(X86Microop):
217 __metaclass__ = FpOpMeta
218 # This class itself doesn't act as a microop
219 abstract = True
220
221 # Default template parameter values
222 flag_code = ""
223 cond_check = "true"
224 else_code = ";"
225 op_class = "FloatAddOp"
226
227 def __init__(self, dest, src1, src2, spm=0, \
228 SetStatus=False, dataSize="env.dataSize"):
229 self.dest = dest
230 self.src1 = src1
231 self.src2 = src2
232 self.spm = spm
233 self.dataSize = dataSize
234 if SetStatus:
235 self.className += "Flags"
236 if spm:
237 self.className += "Top"
238
239 def getAllocator(self, microFlags):
240 return '''new %(class_name)s(machInst, macrocodeBlock,
241 %(flags)s, %(src1)s, %(src2)s, %(dest)s,
242 %(dataSize)s, %(spm)d)''' % {
243 "class_name" : self.className,
244 "flags" : self.microFlagsText(microFlags),
245 "src1" : self.src1, "src2" : self.src2,
246 "dest" : self.dest,
247 "dataSize" : self.dataSize,
248 "spm" : self.spm}
249
250 class Movfp(FpUnaryOp):
251 code = 'FpDestReg_uqw = FpSrcReg1_uqw;'
252 else_code = 'FpDestReg_uqw = FpDestReg_uqw;'
253 cond_check = "checkCondition(ccFlagBits | cfofBits | dfBit | \
254 ecfBit | ezfBit, src2)"
255
256 class Xorfp(FpBinaryOp):
257 code = 'FpDestReg_uqw = FpSrcReg1_uqw ^ FpSrcReg2_uqw;'
258
259 class Sqrtfp(FpBinaryOp):
260 code = 'FpDestReg = sqrt(FpSrcReg2);'
261 op_class = 'FloatSqrtOp'
262
263 class Cosfp(FpUnaryOp):
264 code = 'FpDestReg = cos(FpSrcReg1);'
265 op_class = 'FloatSqrtOp'
266
267 class Sinfp(FpUnaryOp):
268 code = 'FpDestReg = sin(FpSrcReg1);'
269 op_class = 'FloatSqrtOp'
270
271 class Tanfp(FpUnaryOp):
272 code = 'FpDestReg = tan(FpSrcReg1);'
273 op_class = 'FloatSqrtOp'
274
275
276 # Conversion microops
277 class ConvOp(FpBinaryOp):
278 abstract = True
279 op_class = 'FloatCvtOp'
280 def __init__(self, dest, src1):
281 super(ConvOp, self).__init__(dest, src1, \
282 "InstRegIndex(FLOATREG_MICROFP0)")
283
284 # These probably shouldn't look at the ExtMachInst directly to figure
285 # out what size to use and should instead delegate that to the macroop's
286 # constructor. That would be more efficient, and it would make the
287 # microops a little more modular.
288 class cvtf_i2d(ConvOp):
289 code = '''
290 X86IntReg intReg = SSrcReg1;
291 if (REX_W)
292 FpDestReg = intReg.SR;
293 else
294 FpDestReg = intReg.SE;
295 '''
296
297 class cvtf_i2d_hi(ConvOp):
298 code = 'FpDestReg = bits(SSrcReg1, 63, 32);'
299
300 class cvtf_d2i(ConvOp):
301 code = '''
302 int64_t intSrcReg1 = static_cast<int64_t>(FpSrcReg1);
303 if (REX_W)
304 SDestReg = intSrcReg1;
305 else
306 SDestReg = merge(SDestReg, intSrcReg1, 4);
307 '''
308
309 # These need to consider size at some point. They'll always use doubles
310 # for the moment.
311 class addfp(FpBinaryOp):
312 code = 'FpDestReg = FpSrcReg1 + FpSrcReg2;'
313
314 class mulfp(FpBinaryOp):
315 code = 'FpDestReg = FpSrcReg1 * FpSrcReg2;'
316 op_class = 'FloatMultOp'
317
318 class divfp(FpBinaryOp):
319 code = 'FpDestReg = FpSrcReg1 / FpSrcReg2;'
320 op_class = 'FloatDivOp'
321
322 class subfp(FpBinaryOp):
323 code = 'FpDestReg = FpSrcReg1 - FpSrcReg2;'
324
325 class Yl2xFp(FpBinaryOp):
326 code = '''
327 FpDestReg = FpSrcReg2 * (log(FpSrcReg1) / log(2));
328 '''
329 op_class = 'FloatSqrtOp'
330
331 class PremFp(FpBinaryOp):
332 code = '''
333 MiscReg new_fsw(FSW);
334 int src1_exp;
335 int src2_exp;
336 std::frexp(FpSrcReg1, &src1_exp);
337 std::frexp(FpSrcReg2, &src2_exp);
338
339 const int d(src2_exp - src1_exp);
340 if (d < 64) {
341 const int64_t q(std::trunc(FpSrcReg2 / FpSrcReg1));
342 FpDestReg = FpSrcReg2 - FpSrcReg1 * q;
343 new_fsw &= ~(CC0Bit | CC1Bit | CC2Bit | CC2Bit);
344 new_fsw |= (q & 0x1) ? CC1Bit : 0;
345 new_fsw |= (q & 0x2) ? CC3Bit : 0;
346 new_fsw |= (q & 0x4) ? CC0Bit : 0;
347 } else {
348 const int n(42);
349 const int64_t qq(std::trunc(
350 FpSrcReg2 / std::ldexp(FpSrcReg1, d - n)));
351 FpDestReg = FpSrcReg2 - std::ldexp(FpSrcReg1 * qq, d - n);
352 new_fsw |= CC2Bit;
353 }
354 DPRINTF(X86, "src1: %lf, src2: %lf, dest: %lf, FSW: 0x%x\\n",
355 FpSrcReg1, FpSrcReg2, FpDestReg, new_fsw);
356 '''
357 op_class = 'FloatDivOp'
358
359 flag_code = 'FSW = new_fsw;'
360
361 class Compfp(FpBinaryOp):
362 def __init__(self, src1, src2, spm=0, setStatus=False, \
363 dataSize="env.dataSize"):
364 super(Compfp, self).__init__("InstRegIndex(FLOATREG_MICROFP0)", \
365 src1, src2, spm, setStatus, dataSize)
366 # This class sets the condition codes in rflags according to the
367 # rules for comparing floating point.
368 code = '''
369 // ZF PF CF
370 // Unordered 1 1 1
371 // Greater than 0 0 0
372 // Less than 0 0 1
373 // Equal 1 0 0
374 // OF = SF = AF = 0
375 ccFlagBits = ccFlagBits & ~(SFBit | AFBit | ZFBit | PFBit);
376 cfofBits = cfofBits & ~(OFBit | CFBit);
377
378 if (std::isnan(FpSrcReg1) || std::isnan(FpSrcReg2)) {
379 ccFlagBits = ccFlagBits | (ZFBit | PFBit);
380 cfofBits = cfofBits | CFBit;
381 }
382 else if(FpSrcReg1 < FpSrcReg2)
383 cfofBits = cfofBits | CFBit;
384 else if(FpSrcReg1 == FpSrcReg2)
385 ccFlagBits = ccFlagBits | ZFBit;
386 '''
387 op_class = 'FloatCmpOp'
388
389 class absfp(FpUnaryOp):
390 code = 'FpDestReg = fabs(FpSrcReg1);'
391 flag_code = 'FSW = FSW & (~CC1Bit);'
392
393 class chsfp(FpUnaryOp):
394 code = 'FpDestReg = (-1) * (FpSrcReg1);'
395 flag_code = 'FSW = FSW & (~CC1Bit);'
396}};