base.isa (4534:7035ff1aa521) base.isa (4539:6eeeea62b7c4)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:
9//
10// The software must be used only for Non-Commercial Use which means any
11// use which is NOT directed to receiving any direct monetary
12// compensation for, or commercial advantage from such use. Illustrative
13// examples of non-commercial use are academic research, personal study,
14// teaching, education and corporate research & development.
15// Illustrative examples of commercial use are distributing products for
16// commercial advantage and providing services using the software for
17// commercial advantage.
18//
19// If you wish to use this software or functionality therein that may be
20// covered by patents for commercial use, please contact:
21// Director of Intellectual Property Licensing
22// Office of Strategy and Technology
23// Hewlett-Packard Company
24// 1501 Page Mill Road
25// Palo Alto, California 94304
26//
27// Redistributions of source code must retain the above copyright notice,
28// this list of conditions and the following disclaimer. Redistributions
29// in binary form must reproduce the above copyright notice, this list of
30// conditions and the following disclaimer in the documentation and/or
31// other materials provided with the distribution. Neither the name of
32// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
33// contributors may be used to endorse or promote products derived from
34// this software without specific prior written permission. No right of
35// sublicense is granted herewith. Derivatives of the software and
36// output created using the software may be prepared, but only for
37// Non-Commercial Uses. Derivatives of the software may be shared with
38// others provided: (i) the others agree to abide by the list of
39// conditions herein which includes the Non-Commercial Use restrictions;
40// and (ii) such Derivatives of the software include the above copyright
41// notice to acknowledge the contribution from this software where
42// applicable, this list of conditions and the disclaimer below.
43//
44// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
45// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
46// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
47// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
48// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
49// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
50// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
51// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
52// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
53// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
54// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55//
56// Authors: Gabe Black
57
58let {{
59 # This will be populated with mappings between microop mnemonics and
60 # the classes that represent them.
61 microopClasses = {}
62}};
63
64//A class which is the base of all x86 micro ops. It provides a function to
65//set necessary flags appropriately.
66output header {{
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:
9//
10// The software must be used only for Non-Commercial Use which means any
11// use which is NOT directed to receiving any direct monetary
12// compensation for, or commercial advantage from such use. Illustrative
13// examples of non-commercial use are academic research, personal study,
14// teaching, education and corporate research & development.
15// Illustrative examples of commercial use are distributing products for
16// commercial advantage and providing services using the software for
17// commercial advantage.
18//
19// If you wish to use this software or functionality therein that may be
20// covered by patents for commercial use, please contact:
21// Director of Intellectual Property Licensing
22// Office of Strategy and Technology
23// Hewlett-Packard Company
24// 1501 Page Mill Road
25// Palo Alto, California 94304
26//
27// Redistributions of source code must retain the above copyright notice,
28// this list of conditions and the following disclaimer. Redistributions
29// in binary form must reproduce the above copyright notice, this list of
30// conditions and the following disclaimer in the documentation and/or
31// other materials provided with the distribution. Neither the name of
32// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
33// contributors may be used to endorse or promote products derived from
34// this software without specific prior written permission. No right of
35// sublicense is granted herewith. Derivatives of the software and
36// output created using the software may be prepared, but only for
37// Non-Commercial Uses. Derivatives of the software may be shared with
38// others provided: (i) the others agree to abide by the list of
39// conditions herein which includes the Non-Commercial Use restrictions;
40// and (ii) such Derivatives of the software include the above copyright
41// notice to acknowledge the contribution from this software where
42// applicable, this list of conditions and the disclaimer below.
43//
44// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
45// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
46// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
47// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
48// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
49// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
50// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
51// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
52// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
53// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
54// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55//
56// Authors: Gabe Black
57
58let {{
59 # This will be populated with mappings between microop mnemonics and
60 # the classes that represent them.
61 microopClasses = {}
62}};
63
64//A class which is the base of all x86 micro ops. It provides a function to
65//set necessary flags appropriately.
66output header {{
67 class X86MicroOpBase : public X86StaticInst
67 class X86MicroopBase : public X86StaticInst
68 {
69 protected:
70 const char * instMnem;
71 uint8_t opSize;
72 uint8_t addrSize;
73
68 {
69 protected:
70 const char * instMnem;
71 uint8_t opSize;
72 uint8_t addrSize;
73
74 X86MicroOpBase(ExtMachInst _machInst,
74 X86MicroopBase(ExtMachInst _machInst,
75 const char *mnem, const char *_instMnem,
76 bool isMicro, bool isDelayed,
77 bool isFirst, bool isLast,
78 OpClass __opClass) :
79 X86StaticInst(mnem, _machInst, __opClass),
80 instMnem(_instMnem)
81 {
75 const char *mnem, const char *_instMnem,
76 bool isMicro, bool isDelayed,
77 bool isFirst, bool isLast,
78 OpClass __opClass) :
79 X86StaticInst(mnem, _machInst, __opClass),
80 instMnem(_instMnem)
81 {
82 flags[IsMicroOp] = isMicro;
82 flags[IsMicroop] = isMicro;
83 flags[IsDelayedCommit] = isDelayed;
83 flags[IsDelayedCommit] = isDelayed;
84 flags[IsFirstMicroOp] = isFirst;
85 flags[IsLastMicroOp] = isLast;
84 flags[IsFirstMicroop] = isFirst;
85 flags[IsLastMicroop] = isLast;
86 }
87
88 std::string generateDisassembly(Addr pc,
89 const SymbolTable *symtab) const
90 {
91 std::stringstream ss;
92
93 ccprintf(ss, "\t%s.%s", instMnem, mnemonic);
94
95 return ss.str();
96 }
97 };
98}};
99
100//////////////////////////////////////////////////////////////////////////
101//
102// Base class for the python representation of x86 microops
103//
104//////////////////////////////////////////////////////////////////////////
105
106let {{
107 class X86Microop(object):
108 def __init__(self, name):
109 self.name = name
110
86 }
87
88 std::string generateDisassembly(Addr pc,
89 const SymbolTable *symtab) const
90 {
91 std::stringstream ss;
92
93 ccprintf(ss, "\t%s.%s", instMnem, mnemonic);
94
95 return ss.str();
96 }
97 };
98}};
99
100//////////////////////////////////////////////////////////////////////////
101//
102// Base class for the python representation of x86 microops
103//
104//////////////////////////////////////////////////////////////////////////
105
106let {{
107 class X86Microop(object):
108 def __init__(self, name):
109 self.name = name
110
111 # This converts a python bool into a C++ bool
112 def cppBool(self, val):
113 if val:
114 return "true"
115 else:
116 return "false"
117
111 # This converts a list of python bools into
112 # a comma seperated list of C++ bools.
113 def microFlagsText(self, vals):
114 text = ""
115 for val in vals:
118 # This converts a list of python bools into
119 # a comma seperated list of C++ bools.
120 def microFlagsText(self, vals):
121 text = ""
122 for val in vals:
116 if val:
117 text += ", true"
118 else:
119 text += ", false"
123 text += ", %s" % self.cppBool(val)
120 return text
121
122 def getAllocator(self, mnemonic, *microFlags):
123 return 'new %s(machInst, %s)' % (self.className, mnemonic, self.microFlagsText(microFlags))
124}};
125
126//////////////////////////////////////////////////////////////////////////
127//
128// LdStOp Microop templates
129//
130//////////////////////////////////////////////////////////////////////////
131
132def template MicroLdStOpDeclare {{
124 return text
125
126 def getAllocator(self, mnemonic, *microFlags):
127 return 'new %s(machInst, %s)' % (self.className, mnemonic, self.microFlagsText(microFlags))
128}};
129
130//////////////////////////////////////////////////////////////////////////
131//
132// LdStOp Microop templates
133//
134//////////////////////////////////////////////////////////////////////////
135
136def template MicroLdStOpDeclare {{
133 class %(class_name)s : public X86MicroOpBase
137 class %(class_name)s : public X86MicroopBase
134 {
135 protected:
136 const uint8_t scale;
137 const RegIndex index;
138 const RegIndex base;
139 const uint64_t disp;
140 const uint8_t segment;
141 const RegIndex data;
142 const uint8_t dataSize;
143 const uint8_t addressSize;
144 void buildMe();
145
146 public:
147 %(class_name)s(ExtMachInst _machInst,
148 const char * instMnem,
149 bool isMicro, bool isDelayed, bool isFirst, bool isLast,
150 uint8_t _scale, RegIndex _index, RegIndex _base,
151 uint64_t _disp, uint8_t _segment,
152 RegIndex _data,
153 uint8_t _dataSize, uint8_t _addressSize);
154
155 %(class_name)s(ExtMachInst _machInst,
156 const char * instMnem,
157 uint8_t _scale, RegIndex _index, RegIndex _base,
158 uint64_t _disp, uint8_t _segment,
159 RegIndex _data,
160 uint8_t _dataSize, uint8_t _addressSize);
161
162 %(BasicExecDeclare)s
163 };
164}};
165
166def template MicroLdStOpConstructor {{
167
168 inline void %(class_name)s::buildMe()
169 {
170 %(constructor)s;
171 }
172
173 inline %(class_name)s::%(class_name)s(
174 ExtMachInst machInst, const char * instMnem,
175 uint8_t _scale, RegIndex _index, RegIndex _base,
176 uint64_t _disp, uint8_t _segment,
177 RegIndex _data,
178 uint8_t _dataSize, uint8_t _addressSize) :
179 %(base_class)s(machInst, "%(mnemonic)s", instMnem,
180 false, false, false, false, %(op_class)s),
181 scale(_scale), index(_index), base(_base),
182 disp(_disp), segment(_segment),
183 data(_data),
184 dataSize(_dataSize), addressSize(_addressSize)
185 {
186 buildMe();
187 }
188
189 inline %(class_name)s::%(class_name)s(
190 ExtMachInst machInst, const char * instMnem,
191 bool isMicro, bool isDelayed, bool isFirst, bool isLast,
192 uint8_t _scale, RegIndex _index, RegIndex _base,
193 uint64_t _disp, uint8_t segment,
194 RegIndex data,
195 uint8_t dataSize, uint8_t addressSize) :
196 %(base_class)s(machInst, "%(mnemonic)s", instMnem,
197 isMicro, isDelayed, isFirst, isLast, %(op_class)s),
198 scale(_scale), index(_index), base(_base),
199 disp(_disp), segment(_segment),
200 data(_data),
201 dataSize(_dataSize), addressSize(_addressSize)
202 {
203 buildMe();
204 }
205}};
206
207//////////////////////////////////////////////////////////////////////////
208//
209// FpOp Microop templates
210//
211//////////////////////////////////////////////////////////////////////////
212
213//TODO Actually write an fp microop base class.
138 {
139 protected:
140 const uint8_t scale;
141 const RegIndex index;
142 const RegIndex base;
143 const uint64_t disp;
144 const uint8_t segment;
145 const RegIndex data;
146 const uint8_t dataSize;
147 const uint8_t addressSize;
148 void buildMe();
149
150 public:
151 %(class_name)s(ExtMachInst _machInst,
152 const char * instMnem,
153 bool isMicro, bool isDelayed, bool isFirst, bool isLast,
154 uint8_t _scale, RegIndex _index, RegIndex _base,
155 uint64_t _disp, uint8_t _segment,
156 RegIndex _data,
157 uint8_t _dataSize, uint8_t _addressSize);
158
159 %(class_name)s(ExtMachInst _machInst,
160 const char * instMnem,
161 uint8_t _scale, RegIndex _index, RegIndex _base,
162 uint64_t _disp, uint8_t _segment,
163 RegIndex _data,
164 uint8_t _dataSize, uint8_t _addressSize);
165
166 %(BasicExecDeclare)s
167 };
168}};
169
170def template MicroLdStOpConstructor {{
171
172 inline void %(class_name)s::buildMe()
173 {
174 %(constructor)s;
175 }
176
177 inline %(class_name)s::%(class_name)s(
178 ExtMachInst machInst, const char * instMnem,
179 uint8_t _scale, RegIndex _index, RegIndex _base,
180 uint64_t _disp, uint8_t _segment,
181 RegIndex _data,
182 uint8_t _dataSize, uint8_t _addressSize) :
183 %(base_class)s(machInst, "%(mnemonic)s", instMnem,
184 false, false, false, false, %(op_class)s),
185 scale(_scale), index(_index), base(_base),
186 disp(_disp), segment(_segment),
187 data(_data),
188 dataSize(_dataSize), addressSize(_addressSize)
189 {
190 buildMe();
191 }
192
193 inline %(class_name)s::%(class_name)s(
194 ExtMachInst machInst, const char * instMnem,
195 bool isMicro, bool isDelayed, bool isFirst, bool isLast,
196 uint8_t _scale, RegIndex _index, RegIndex _base,
197 uint64_t _disp, uint8_t segment,
198 RegIndex data,
199 uint8_t dataSize, uint8_t addressSize) :
200 %(base_class)s(machInst, "%(mnemonic)s", instMnem,
201 isMicro, isDelayed, isFirst, isLast, %(op_class)s),
202 scale(_scale), index(_index), base(_base),
203 disp(_disp), segment(_segment),
204 data(_data),
205 dataSize(_dataSize), addressSize(_addressSize)
206 {
207 buildMe();
208 }
209}};
210
211//////////////////////////////////////////////////////////////////////////
212//
213// FpOp Microop templates
214//
215//////////////////////////////////////////////////////////////////////////
216
217//TODO Actually write an fp microop base class.