macroop.isa (5040:126e4510b5bb) macroop.isa (5046:da031ef02439)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:

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216 self.stackSize = "STACKSIZE"
217 self.doModRM = False
218
219 def getAllocator(self):
220 if self.size == 'b':
221 self.dataSize = 1
222 elif self.size == 'd':
223 self.dataSize = 4
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// Redistribution and use of this software in source and binary forms,
7// with or without modification, are permitted provided that the
8// following conditions are met:

--- 207 unchanged lines hidden (view full) ---

216 self.stackSize = "STACKSIZE"
217 self.doModRM = False
218
219 def getAllocator(self):
220 if self.size == 'b':
221 self.dataSize = 1
222 elif self.size == 'd':
223 self.dataSize = 4
224 #This is for "double plus" which is normally a double word unless
225 #the REX W bit is set, in which case it's a quad word. It's used
226 #for some SSE instructions.
227 elif self.size == 'dp':
228 self.dataSize = "(REX_W ? 8 : 4)"
224 elif self.size == 'q':
225 self.dataSize = 8
226 elif self.size == 'v':
227 self.dataSize = "OPSIZE"
228 elif self.size == 'w':
229 self.dataSize = 2
230 elif self.size == 'z':
231 self.dataSize = "((OPSIZE == 8) ? 4 : OPSIZE)"

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246 self.regm = reg
247 self.regmUsed = True
248 else:
249 raise Exception, "EmulEnv is out of register specialization spots."
250 def setSize(self, size):
251 if not self.size:
252 self.size = size
253 else:
229 elif self.size == 'q':
230 self.dataSize = 8
231 elif self.size == 'v':
232 self.dataSize = "OPSIZE"
233 elif self.size == 'w':
234 self.dataSize = 2
235 elif self.size == 'z':
236 self.dataSize = "((OPSIZE == 8) ? 4 : OPSIZE)"

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251 self.regm = reg
252 self.regmUsed = True
253 else:
254 raise Exception, "EmulEnv is out of register specialization spots."
255 def setSize(self, size):
256 if not self.size:
257 self.size = size
258 else:
254 if self.size is not size:
259 if self.size != size:
255 raise Exception, "Conflicting register sizes %s and %s!" %\
256 (self.size, size)
257}};
258
259let {{
260 doModRMString = "env.doModRM(machInst);\n"
261 def genMacroop(Name, env):
262 blocks = OutputBlocks()

--- 12 unchanged lines hidden --- 		260 raise Exception, "Conflicting register sizes %s and %s!" %\
261 (self.size, size)
262}};
263
264let {{
265 doModRMString = "env.doModRM(machInst);\n"
266 def genMacroop(Name, env):
267 blocks = OutputBlocks()

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