1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated
12// unmodified and in its entirety in all distributions of the software,
13// modified or unmodified, in source code or in binary form.
14//
15// Redistribution and use in source and binary forms, with or without
16// modification, are permitted provided that the following conditions are
17// met: redistributions of source code must retain the above copyright
18// notice, this list of conditions and the following disclaimer;
19// redistributions in binary form must reproduce the above copyright
20// notice, this list of conditions and the following disclaimer in the
21// documentation and/or other materials provided with the distribution;
22// neither the name of the copyright holders nor the names of its
23// contributors may be used to endorse or promote products derived from
24// this software without specific prior written permission.
25//
26// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37//
38// Authors: Gabe Black
39
40//////////////////////////////////////////////////////////////////////////////
41//
42// Architecture independent
43//
44
45// Execute method for macroops.
46def template MacroExecPanic {{
47 Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const
48 {
49 panic("Tried to execute macroop directly!");
50 return NoFault;
51 }
52}};
53
54output header {{
55
56 // Base class for combinationally generated macroops
57 class Macroop : public X86ISA::MacroopBase
58 {
59 public:
60 Macroop(const char *mnem, ExtMachInst _machInst,
61 uint32_t _numMicroops, X86ISA::EmulEnv _env)
62 : MacroopBase(mnem, _machInst, _numMicroops, _env)
63 {}
64 %(MacroExecPanic)s
65 };
66}};
67
68//////////////////////////////////////////////////////////////////////////////
69//
70// X86 specific
71//
72//////////////////////////////////////////////////////////////////////////////
73
74// Basic instruction class declaration template.
75def template MacroDeclare {{
76 namespace X86Macroop
77 {
78 /**
79 * Static instruction class for "%(mnemonic)s".
80 */
81 class %(class_name)s : public %(base_class)s
82 {
83 private:
84 %(declareLabels)s
85 public:
86 // Constructor.
87 %(class_name)s(ExtMachInst machInst, X86ISA::EmulEnv _env);
88
89 std::string
90 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
91 };
92 }
93}};
94
95def template MacroDisassembly {{
96 std::string
97 X86Macroop::%(class_name)s::generateDisassembly(Addr pc,
98 const SymbolTable *symtab) const
99 {
100 std::stringstream out;
101 out << mnemonic << "\t";
102
103 int regSize = %(regSize)s;
104 %(disassembly)s
105 // Shut up gcc.
106 regSize = regSize;
107 return out.str();
108 }
109}};
110
111// Basic instruction class constructor template.
112def template MacroConstructor {{
| 1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 The Hewlett-Packard Development Company
4// All rights reserved.
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder. You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated
12// unmodified and in its entirety in all distributions of the software,
13// modified or unmodified, in source code or in binary form.
14//
15// Redistribution and use in source and binary forms, with or without
16// modification, are permitted provided that the following conditions are
17// met: redistributions of source code must retain the above copyright
18// notice, this list of conditions and the following disclaimer;
19// redistributions in binary form must reproduce the above copyright
20// notice, this list of conditions and the following disclaimer in the
21// documentation and/or other materials provided with the distribution;
22// neither the name of the copyright holders nor the names of its
23// contributors may be used to endorse or promote products derived from
24// this software without specific prior written permission.
25//
26// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37//
38// Authors: Gabe Black
39
40//////////////////////////////////////////////////////////////////////////////
41//
42// Architecture independent
43//
44
45// Execute method for macroops.
46def template MacroExecPanic {{
47 Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const
48 {
49 panic("Tried to execute macroop directly!");
50 return NoFault;
51 }
52}};
53
54output header {{
55
56 // Base class for combinationally generated macroops
57 class Macroop : public X86ISA::MacroopBase
58 {
59 public:
60 Macroop(const char *mnem, ExtMachInst _machInst,
61 uint32_t _numMicroops, X86ISA::EmulEnv _env)
62 : MacroopBase(mnem, _machInst, _numMicroops, _env)
63 {}
64 %(MacroExecPanic)s
65 };
66}};
67
68//////////////////////////////////////////////////////////////////////////////
69//
70// X86 specific
71//
72//////////////////////////////////////////////////////////////////////////////
73
74// Basic instruction class declaration template.
75def template MacroDeclare {{
76 namespace X86Macroop
77 {
78 /**
79 * Static instruction class for "%(mnemonic)s".
80 */
81 class %(class_name)s : public %(base_class)s
82 {
83 private:
84 %(declareLabels)s
85 public:
86 // Constructor.
87 %(class_name)s(ExtMachInst machInst, X86ISA::EmulEnv _env);
88
89 std::string
90 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
91 };
92 }
93}};
94
95def template MacroDisassembly {{
96 std::string
97 X86Macroop::%(class_name)s::generateDisassembly(Addr pc,
98 const SymbolTable *symtab) const
99 {
100 std::stringstream out;
101 out << mnemonic << "\t";
102
103 int regSize = %(regSize)s;
104 %(disassembly)s
105 // Shut up gcc.
106 regSize = regSize;
107 return out.str();
108 }
109}};
110
111// Basic instruction class constructor template.
112def template MacroConstructor {{
|
114 ExtMachInst machInst, EmulEnv _env)
115 : %(base_class)s("%(mnemonic)s", machInst, %(num_microops)s, _env)
116 {
117 %(adjust_env)s;
118 %(adjust_imm)s;
119 %(adjust_disp)s;
120 %(init_env)s;
121 %(constructor)s;
122 const char *macrocodeBlock = "%(class_name)s";
123 //alloc_microops is the code that sets up the microops
124 //array in the parent class.
125 %(alloc_microops)s;
126 }
127}};
128
129let {{
130 from micro_asm import Combinational_Macroop, Rom_Macroop
131 class X86Macroop(Combinational_Macroop):
132 def add_microop(self, mnemonic, microop):
133 microop.mnemonic = mnemonic
134 microop.micropc = len(self.microops)
135 self.microops.append(microop)
136 def setAdjustEnv(self, val):
137 self.adjust_env = val
138 def adjustImm(self, val):
139 self.adjust_imm += val
140 def adjustDisp(self, val):
141 self.adjust_disp += val
142 def serializing(self):
143 self.serializing = True
144
145 def function_call(self):
146 self.function_call = True
147 def function_return(self):
148 self.function_return = True
149
150 def __init__(self, name):
151 super(X86Macroop, self).__init__(name)
152 self.directives = {
153 "adjust_env" : self.setAdjustEnv,
154 "adjust_imm" : self.adjustImm,
155 "adjust_disp" : self.adjustDisp,
156 "serializing" : self.serializing,
157 "function_call" : self.function_call,
158 "function_return" : self.function_return
159 }
160 self.declared = False
161 self.adjust_env = ""
162 self.init_env = ""
163 self.adjust_imm = '''
164 uint64_t adjustedImm = IMMEDIATE;
165 //This is to pacify gcc in case the immediate isn't used.
166 adjustedImm = adjustedImm;
167 '''
168 self.adjust_disp = '''
169 uint64_t adjustedDisp = DISPLACEMENT;
170 //This is to pacify gcc in case the displacement isn't used.
171 adjustedDisp = adjustedDisp;
172 '''
173 self.serializing = False
174 self.function_call = False
175 self.function_return = False
176
177 def getAllocator(self, env):
178 return "new X86Macroop::%s(machInst, %s)" % \
179 (self.name, env.getAllocator())
180 def getMnemonic(self):
181 mnemonic = self.name.lower()
182 mnemonic = re.match(r'[^_]*', mnemonic).group(0)
183 return mnemonic
184 def getDeclaration(self):
185 #FIXME This first parameter should be the mnemonic. I need to
186 #write some code which pulls that out
187 declareLabels = ""
188 for (label, microop) in self.labels.items():
189 declareLabels += "const static uint64_t label_%s = %d;\n" \
190 % (label, microop.micropc)
191 iop = InstObjParams(self.getMnemonic(), self.name, "Macroop",
192 {"code" : "",
193 "declareLabels" : declareLabels
194 })
195 return MacroDeclare.subst(iop);
196 def getDefinition(self, env):
197 #FIXME This first parameter should be the mnemonic. I need to
198 #write some code which pulls that out
199 numMicroops = len(self.microops)
200 allocMicroops = ''
201 micropc = 0
202 for op in self.microops:
203 flags = ["IsMicroop"]
204 if micropc == numMicroops - 1:
205 flags.append("IsLastMicroop")
206
207 if self.serializing:
208 flags.append("IsSerializing")
209 flags.append("IsSerializeAfter")
210
211 if self.function_call:
212 flags.append("IsCall")
213 if self.function_return:
214 flags.append("IsReturn")
215 else:
216 flags.append("IsDelayedCommit")
217 if micropc == 0:
218 flags.append("IsFirstMicroop")
219 allocMicroops += \
220 "microops[%d] = %s;\n" % \
221 (micropc, op.getAllocator(flags))
222 micropc += 1
223 if env.useStackSize:
224 useStackSize = "true"
225 else:
226 useStackSize = "false"
227 if env.memoryInst:
228 memoryInst = "true"
229 else:
230 memoryInst = "false"
231 regSize = '''(%s || (env.base == INTREG_RSP && %s) ?
232 env.stackSize :
233 env.dataSize)''' % (useStackSize, memoryInst)
234 iop = InstObjParams(self.getMnemonic(), self.name, "Macroop",
235 {"code" : "", "num_microops" : numMicroops,
236 "alloc_microops" : allocMicroops,
237 "adjust_env" : self.adjust_env,
238 "adjust_imm" : self.adjust_imm,
239 "adjust_disp" : self.adjust_disp,
240 "disassembly" : env.disassembly,
241 "regSize" : regSize,
242 "init_env" : self.initEnv})
243 return MacroConstructor.subst(iop) + \
244 MacroDisassembly.subst(iop);
245}};
246
247let {{
248 class EmulEnv(object):
249 def __init__(self):
250 self.reg = "0"
251 self.regUsed = False
252 self.regm = "0"
253 self.regmUsed = False
254 self.seg = "SEGMENT_REG_DS"
255 self.size = None
256 self.addressSize = "ADDRSIZE"
257 self.dataSize = "OPSIZE"
258 self.stackSize = "STACKSIZE"
259 self.doModRM = False
260 self.disassembly = ""
261 self.firstArgument = True
262 self.useStackSize = False
263 self.memoryInst = False
264
265 def addToDisassembly(self, code):
266 if not self.firstArgument:
267 self.disassembly += "out << \", \";\n"
268 self.firstArgument = False
269 self.disassembly += code
270
271 def getAllocator(self):
272 if self.size == 'b':
273 self.dataSize = 1
274 elif self.size == 'd':
275 self.dataSize = 4
276 #This is for "double plus" which is normally a double word unless
277 #the REX W bit is set, in which case it's a quad word. It's used
278 #for some SSE instructions.
279 elif self.size == 'dp':
280 self.dataSize = "(REX_W ? 8 : 4)"
281 elif self.size == 'q':
282 self.dataSize = 8
283 elif self.size == 'v':
284 self.dataSize = "OPSIZE"
285 elif self.size == 'w':
286 self.dataSize = 2
287 elif self.size == 'z':
288 self.dataSize = "((OPSIZE == 8) ? 4 : OPSIZE)"
289 elif self.size:
290 raise Exception, "Unrecognized size type %s!" % self.size
291 return '''EmulEnv(%(reg)s,
292 %(regm)s,
293 %(dataSize)s,
294 %(addressSize)s,
295 %(stackSize)s)''' % \
296 self.__dict__
297
298 def addReg(self, reg):
299 if not self.regUsed:
300 self.reg = reg
301 self.regUsed = True
302 elif not self.regmUsed:
303 self.regm = reg
304 self.regmUsed = True
305 else:
306 raise Exception, "EmulEnv is out of register specialization spots."
307 def setSize(self, size):
308 if not self.size:
309 self.size = size
310 else:
311 if self.size != size:
312 raise Exception, "Conflicting register sizes %s and %s!" %\
313 (self.size, size)
314}};
315
316let {{
317 doModRMString = "env.doModRM(machInst);\n"
318 noModRMString = "env.setSeg(machInst);\n"
319 def genMacroop(Name, env):
320 blocks = OutputBlocks()
321 if not macroopDict.has_key(Name):
322 raise Exception, "Unrecognized instruction: %s" % Name
323 macroop = macroopDict[Name]
324 if not macroop.declared:
325 if env.doModRM:
326 macroop.initEnv = doModRMString
327 else:
328 macroop.initEnv = noModRMString
329 blocks.header_output = macroop.getDeclaration()
330 blocks.decoder_output = macroop.getDefinition(env)
331 macroop.declared = True
332 blocks.decode_block = "return %s;\n" % macroop.getAllocator(env)
333 return blocks
334}};
| 114 ExtMachInst machInst, EmulEnv _env)
115 : %(base_class)s("%(mnemonic)s", machInst, %(num_microops)s, _env)
116 {
117 %(adjust_env)s;
118 %(adjust_imm)s;
119 %(adjust_disp)s;
120 %(init_env)s;
121 %(constructor)s;
122 const char *macrocodeBlock = "%(class_name)s";
123 //alloc_microops is the code that sets up the microops
124 //array in the parent class.
125 %(alloc_microops)s;
126 }
127}};
128
129let {{
130 from micro_asm import Combinational_Macroop, Rom_Macroop
131 class X86Macroop(Combinational_Macroop):
132 def add_microop(self, mnemonic, microop):
133 microop.mnemonic = mnemonic
134 microop.micropc = len(self.microops)
135 self.microops.append(microop)
136 def setAdjustEnv(self, val):
137 self.adjust_env = val
138 def adjustImm(self, val):
139 self.adjust_imm += val
140 def adjustDisp(self, val):
141 self.adjust_disp += val
142 def serializing(self):
143 self.serializing = True
144
145 def function_call(self):
146 self.function_call = True
147 def function_return(self):
148 self.function_return = True
149
150 def __init__(self, name):
151 super(X86Macroop, self).__init__(name)
152 self.directives = {
153 "adjust_env" : self.setAdjustEnv,
154 "adjust_imm" : self.adjustImm,
155 "adjust_disp" : self.adjustDisp,
156 "serializing" : self.serializing,
157 "function_call" : self.function_call,
158 "function_return" : self.function_return
159 }
160 self.declared = False
161 self.adjust_env = ""
162 self.init_env = ""
163 self.adjust_imm = '''
164 uint64_t adjustedImm = IMMEDIATE;
165 //This is to pacify gcc in case the immediate isn't used.
166 adjustedImm = adjustedImm;
167 '''
168 self.adjust_disp = '''
169 uint64_t adjustedDisp = DISPLACEMENT;
170 //This is to pacify gcc in case the displacement isn't used.
171 adjustedDisp = adjustedDisp;
172 '''
173 self.serializing = False
174 self.function_call = False
175 self.function_return = False
176
177 def getAllocator(self, env):
178 return "new X86Macroop::%s(machInst, %s)" % \
179 (self.name, env.getAllocator())
180 def getMnemonic(self):
181 mnemonic = self.name.lower()
182 mnemonic = re.match(r'[^_]*', mnemonic).group(0)
183 return mnemonic
184 def getDeclaration(self):
185 #FIXME This first parameter should be the mnemonic. I need to
186 #write some code which pulls that out
187 declareLabels = ""
188 for (label, microop) in self.labels.items():
189 declareLabels += "const static uint64_t label_%s = %d;\n" \
190 % (label, microop.micropc)
191 iop = InstObjParams(self.getMnemonic(), self.name, "Macroop",
192 {"code" : "",
193 "declareLabels" : declareLabels
194 })
195 return MacroDeclare.subst(iop);
196 def getDefinition(self, env):
197 #FIXME This first parameter should be the mnemonic. I need to
198 #write some code which pulls that out
199 numMicroops = len(self.microops)
200 allocMicroops = ''
201 micropc = 0
202 for op in self.microops:
203 flags = ["IsMicroop"]
204 if micropc == numMicroops - 1:
205 flags.append("IsLastMicroop")
206
207 if self.serializing:
208 flags.append("IsSerializing")
209 flags.append("IsSerializeAfter")
210
211 if self.function_call:
212 flags.append("IsCall")
213 if self.function_return:
214 flags.append("IsReturn")
215 else:
216 flags.append("IsDelayedCommit")
217 if micropc == 0:
218 flags.append("IsFirstMicroop")
219 allocMicroops += \
220 "microops[%d] = %s;\n" % \
221 (micropc, op.getAllocator(flags))
222 micropc += 1
223 if env.useStackSize:
224 useStackSize = "true"
225 else:
226 useStackSize = "false"
227 if env.memoryInst:
228 memoryInst = "true"
229 else:
230 memoryInst = "false"
231 regSize = '''(%s || (env.base == INTREG_RSP && %s) ?
232 env.stackSize :
233 env.dataSize)''' % (useStackSize, memoryInst)
234 iop = InstObjParams(self.getMnemonic(), self.name, "Macroop",
235 {"code" : "", "num_microops" : numMicroops,
236 "alloc_microops" : allocMicroops,
237 "adjust_env" : self.adjust_env,
238 "adjust_imm" : self.adjust_imm,
239 "adjust_disp" : self.adjust_disp,
240 "disassembly" : env.disassembly,
241 "regSize" : regSize,
242 "init_env" : self.initEnv})
243 return MacroConstructor.subst(iop) + \
244 MacroDisassembly.subst(iop);
245}};
246
247let {{
248 class EmulEnv(object):
249 def __init__(self):
250 self.reg = "0"
251 self.regUsed = False
252 self.regm = "0"
253 self.regmUsed = False
254 self.seg = "SEGMENT_REG_DS"
255 self.size = None
256 self.addressSize = "ADDRSIZE"
257 self.dataSize = "OPSIZE"
258 self.stackSize = "STACKSIZE"
259 self.doModRM = False
260 self.disassembly = ""
261 self.firstArgument = True
262 self.useStackSize = False
263 self.memoryInst = False
264
265 def addToDisassembly(self, code):
266 if not self.firstArgument:
267 self.disassembly += "out << \", \";\n"
268 self.firstArgument = False
269 self.disassembly += code
270
271 def getAllocator(self):
272 if self.size == 'b':
273 self.dataSize = 1
274 elif self.size == 'd':
275 self.dataSize = 4
276 #This is for "double plus" which is normally a double word unless
277 #the REX W bit is set, in which case it's a quad word. It's used
278 #for some SSE instructions.
279 elif self.size == 'dp':
280 self.dataSize = "(REX_W ? 8 : 4)"
281 elif self.size == 'q':
282 self.dataSize = 8
283 elif self.size == 'v':
284 self.dataSize = "OPSIZE"
285 elif self.size == 'w':
286 self.dataSize = 2
287 elif self.size == 'z':
288 self.dataSize = "((OPSIZE == 8) ? 4 : OPSIZE)"
289 elif self.size:
290 raise Exception, "Unrecognized size type %s!" % self.size
291 return '''EmulEnv(%(reg)s,
292 %(regm)s,
293 %(dataSize)s,
294 %(addressSize)s,
295 %(stackSize)s)''' % \
296 self.__dict__
297
298 def addReg(self, reg):
299 if not self.regUsed:
300 self.reg = reg
301 self.regUsed = True
302 elif not self.regmUsed:
303 self.regm = reg
304 self.regmUsed = True
305 else:
306 raise Exception, "EmulEnv is out of register specialization spots."
307 def setSize(self, size):
308 if not self.size:
309 self.size = size
310 else:
311 if self.size != size:
312 raise Exception, "Conflicting register sizes %s and %s!" %\
313 (self.size, size)
314}};
315
316let {{
317 doModRMString = "env.doModRM(machInst);\n"
318 noModRMString = "env.setSeg(machInst);\n"
319 def genMacroop(Name, env):
320 blocks = OutputBlocks()
321 if not macroopDict.has_key(Name):
322 raise Exception, "Unrecognized instruction: %s" % Name
323 macroop = macroopDict[Name]
324 if not macroop.declared:
325 if env.doModRM:
326 macroop.initEnv = doModRMString
327 else:
328 macroop.initEnv = noModRMString
329 blocks.header_output = macroop.getDeclaration()
330 blocks.decoder_output = macroop.getDefinition(env)
331 macroop.declared = True
332 blocks.decode_block = "return %s;\n" % macroop.getAllocator(env)
333 return blocks
334}};
|