msrs.py (5325:f55260052610) | msrs.py (5409:0343cd06df4f) |
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1# Copyright (c) 2008 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 85 unchanged lines hidden (view full) --- 94def macroop WRMSR 95{ 96 limm t1, "IntAddrPrefixMSR >> 3" 97 mov t2, t2, rax, dataSize=4 98 slli t3, rdx, 32, dataSize=8 99 or t2, t2, t3, dataSize=8 100 st t2, intseg, [8, t1, rcx], dataSize=8, addressSize=4 101}; | 1# Copyright (c) 2008 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 85 unchanged lines hidden (view full) --- 94def macroop WRMSR 95{ 96 limm t1, "IntAddrPrefixMSR >> 3" 97 mov t2, t2, rax, dataSize=4 98 slli t3, rdx, 32, dataSize=8 99 or t2, t2, t3, dataSize=8 100 st t2, intseg, [8, t1, rcx], dataSize=8, addressSize=4 101}; |
102 103def macroop RDTSC 104{ 105 rdtsc t1 106 mov rax, rax, t1, dataSize=4 107 srli t1, t1, 32, dataSize=8 108 mov rdx, rdx, t1, dataSize=4 109}; |
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102''' | 110''' |