70a71,85
>
> def macroop SMSW_R {
> rdcr reg, 0
> };
>
> def macroop SMSW_M {
> rdcr t1, 0
> st t1, seg, sib, disp, dataSize=2
> };
>
> def macroop SMSW_P {
> rdcr t1, 0
> rdip t7, dataSize=asz
> st t1, seg, riprel, disp, dataSize=2
> };