83,84c83,84
< sub t5, t5, t10, dataSize=8
< andi t0, t5, 0x3, flags=(EZF,), dataSize=8
---
> andi t5, t5, 0x3, dataSize=8
> sub t0, t5, t10, flags=(EZF,), dataSize=8
90,92c90,92
< srli t10, t4, 32, dataSize=8
< andi t10, t10, 0x7, dataSize=8
< subi t0, t10, 1, flags=(ECF,), dataSize=8
---
> srli t12, t4, 32, dataSize=8
> andi t12, t12, 0x7, dataSize=8
> subi t0, t12, 1, flags=(ECF,), dataSize=8
99,105d98
< andi t6, t6, 0xF0, dataSize=1
< subi t6, t6, 40 + %(errorCodeSize)d, dataSize=8
<
< # Check that we can access everything we need to on the stack
< ldst t0, hs, [1, t0, t6], dataSize=8, addressSize=8
< ldst t0, hs, [1, t0, t6], \
< 32 + %(errorCodeSize)d, dataSize=8, addressSize=8
113c106,107
< panic "CPL change initiated stack switching isn't implemented"
---
> # Get the new rsp from the TSS
> ld t6, tr, [8, t10, t0], 4, dataSize=8, addressSize=8
116a111,112
> andi t6, t6, 0xF0, dataSize=1
> subi t6, t6, 40 + %(errorCodeSize)d, dataSize=8
117a114,118
> # Check that we can access everything we need to on the stack
> ldst t0, hs, [1, t0, t6], dataSize=8, addressSize=8
> ldst t0, hs, [1, t0, t6], \
> 32 + %(errorCodeSize)d, dataSize=8, addressSize=8
>