1# Copyright (c) 2008 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

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204'''
205def rom
206{
207 # This vectors the CPU into an interrupt handler in legacy mode.
208 extern legacyModeInterrupt:
209 panic "Legacy mode interrupts not implemented (in microcode)"
210 eret
211};
212
213def rom
214{
215 extern initIntHalt:
216 rflags t1
217 limm t2, "~IFBit"
218 and t1, t1, t2
219 wrflags t1, t0
220 halt
221 eret
222};
223'''