semaphores.py (8610:9bdd52a2214c) | semaphores.py (11329:82bb3ee706b3) |
---|---|
1# Copyright (c) 2007 The Hewlett-Packard Development Company | 1# Copyright (c) 2007 The Hewlett-Packard Development Company |
2# Copyright (c) 2015 Advanced Micro Devices, Inc. |
|
2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated --- 111 unchanged lines hidden (view full) --- 121def macroop XADD_R_R { 122 add t2, regm, reg, flags=(OF,SF,ZF,AF,PF,CF) 123 mov regm, regm, reg 124 mov reg, reg, t2 125}; 126 127''' 128 | 3# All rights reserved. 4# 5# The license below extends only to copyright in the software and shall 6# not be construed as granting a license to any other intellectual 7# property including but not limited to intellectual property relating 8# to a hardware implementation of the functionality of the software 9# licensed hereunder. You may use the software subject to the license 10# terms below provided that you ensure that this notice is replicated --- 111 unchanged lines hidden (view full) --- 122def macroop XADD_R_R { 123 add t2, regm, reg, flags=(OF,SF,ZF,AF,PF,CF) 124 mov regm, regm, reg 125 mov reg, reg, t2 126}; 127 128''' 129 |
130# Despite the name, this microcode sequence implements both 131# cmpxchg8b and cmpxchg16b, depending on the dynamic value 132# of dataSize. |
|
129cmpxchg8bCode = ''' 130def macroop CMPXCHG8B_%(suffix)s { 131 %(rdip)s 132 lea t1, seg, %(sib)s, disp, dataSize=asz | 133cmpxchg8bCode = ''' 134def macroop CMPXCHG8B_%(suffix)s { 135 %(rdip)s 136 lea t1, seg, %(sib)s, disp, dataSize=asz |
133 ldst%(l)s t2, seg, [1, t0, t1], 0 134 ldst%(l)s t3, seg, [1, t0, t1], dsz | 137 ldsplit%(l)s (t2, t3), seg, [1, t0, t1], disp=0 |
135 136 sub t0, rax, t2, flags=(ZF,) 137 br label("doneComparing"), flags=(nCZF,) 138 sub t0, rdx, t3, flags=(ZF,) 139doneComparing: 140 141 # If they're equal, set t3:t2 to rbx:rcx to write to memory 142 mov t2, t2, rbx, flags=(CZF,) 143 mov t3, t3, rcx, flags=(CZF,) 144 145 # If they're not equal, set rdx:rax to the value from memory. 146 mov rax, rax, t2, flags=(nCZF,) 147 mov rdx, rdx, t3, flags=(nCZF,) 148 149 # Write to memory | 138 139 sub t0, rax, t2, flags=(ZF,) 140 br label("doneComparing"), flags=(nCZF,) 141 sub t0, rdx, t3, flags=(ZF,) 142doneComparing: 143 144 # If they're equal, set t3:t2 to rbx:rcx to write to memory 145 mov t2, t2, rbx, flags=(CZF,) 146 mov t3, t3, rcx, flags=(CZF,) 147 148 # If they're not equal, set rdx:rax to the value from memory. 149 mov rax, rax, t2, flags=(nCZF,) 150 mov rdx, rdx, t3, flags=(nCZF,) 151 152 # Write to memory |
150 st%(ul)s t3, seg, [1, t0, t1], dsz 151 st%(ul)s t2, seg, [1, t0, t1], 0 | 153 stsplit%(ul)s (t2, t3), seg, [1, t0, t1], disp=0 |
152}; 153''' 154 155microcode += cmpxchg8bCode % {"rdip": "", "sib": "sib", 156 "l": "", "ul": "", 157 "suffix": "M"} 158microcode += cmpxchg8bCode % {"rdip": "rdip t7", "sib": "riprel", 159 "l": "", "ul": "", --- 12 unchanged lines hidden --- | 154}; 155''' 156 157microcode += cmpxchg8bCode % {"rdip": "", "sib": "sib", 158 "l": "", "ul": "", 159 "suffix": "M"} 160microcode += cmpxchg8bCode % {"rdip": "rdip t7", "sib": "riprel", 161 "l": "", "ul": "", --- 12 unchanged lines hidden --- |