semaphores.py (7087:fb8d5786ff30) semaphores.py (8610:9bdd52a2214c)
1# Copyright (c) 2007 The Hewlett-Packard Development Company
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

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57 sub t0, rax, t1, flags=(OF, SF, ZF, AF, PF, CF)
58
59 mov t1, t1, reg, flags=(CZF,)
60 st t1, seg, riprel, disp
61 mov rax, rax, t1, flags=(nCZF,)
62};
63
64def macroop CMPXCHG_LOCKED_M_R {
1# Copyright (c) 2007 The Hewlett-Packard Development Company
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder. You may use the software subject to the license

--- 48 unchanged lines hidden (view full) ---

57 sub t0, rax, t1, flags=(OF, SF, ZF, AF, PF, CF)
58
59 mov t1, t1, reg, flags=(CZF,)
60 st t1, seg, riprel, disp
61 mov rax, rax, t1, flags=(nCZF,)
62};
63
64def macroop CMPXCHG_LOCKED_M_R {
65 mfence
65 ldstl t1, seg, sib, disp
66 sub t0, rax, t1, flags=(OF, SF, ZF, AF, PF, CF)
67
68 mov t1, t1, reg, flags=(CZF,)
69 stul t1, seg, sib, disp
66 ldstl t1, seg, sib, disp
67 sub t0, rax, t1, flags=(OF, SF, ZF, AF, PF, CF)
68
69 mov t1, t1, reg, flags=(CZF,)
70 stul t1, seg, sib, disp
71 mfence
70 mov rax, rax, t1, flags=(nCZF,)
71};
72
73def macroop CMPXCHG_LOCKED_P_R {
74 rdip t7
72 mov rax, rax, t1, flags=(nCZF,)
73};
74
75def macroop CMPXCHG_LOCKED_P_R {
76 rdip t7
77 mfence
75 ldstl t1, seg, riprel, disp
76 sub t0, rax, t1, flags=(OF, SF, ZF, AF, PF, CF)
77
78 mov t1, t1, reg, flags=(CZF,)
79 stul t1, seg, riprel, disp
78 ldstl t1, seg, riprel, disp
79 sub t0, rax, t1, flags=(OF, SF, ZF, AF, PF, CF)
80
81 mov t1, t1, reg, flags=(CZF,)
82 stul t1, seg, riprel, disp
83 mfence
80 mov rax, rax, t1, flags=(nCZF,)
81};
82
83def macroop XADD_M_R {
84 ldst t1, seg, sib, disp
85 add t2, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
86 st t2, seg, sib, disp
87 mov reg, reg, t1
88};
89
90def macroop XADD_P_R {
91 rdip t7
92 ldst t1, seg, riprel, disp
93 add t2, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
94 st t2, seg, riprel, disp
95 mov reg, reg, t1
96};
97
98def macroop XADD_LOCKED_M_R {
84 mov rax, rax, t1, flags=(nCZF,)
85};
86
87def macroop XADD_M_R {
88 ldst t1, seg, sib, disp
89 add t2, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
90 st t2, seg, sib, disp
91 mov reg, reg, t1
92};
93
94def macroop XADD_P_R {
95 rdip t7
96 ldst t1, seg, riprel, disp
97 add t2, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
98 st t2, seg, riprel, disp
99 mov reg, reg, t1
100};
101
102def macroop XADD_LOCKED_M_R {
103 mfence
99 ldstl t1, seg, sib, disp
100 add t2, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
101 stul t2, seg, sib, disp
104 ldstl t1, seg, sib, disp
105 add t2, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
106 stul t2, seg, sib, disp
107 mfence
102 mov reg, reg, t1
103};
104
105def macroop XADD_LOCKED_P_R {
106 rdip t7
108 mov reg, reg, t1
109};
110
111def macroop XADD_LOCKED_P_R {
112 rdip t7
113 mfence
107 ldstl t1, seg, riprel, disp
108 add t2, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
109 stul t2, seg, riprel, disp
114 ldstl t1, seg, riprel, disp
115 add t2, t1, reg, flags=(OF,SF,ZF,AF,PF,CF)
116 stul t2, seg, riprel, disp
117 mfence
110 mov reg, reg, t1
111};
112
113def macroop XADD_R_R {
114 add t2, regm, reg, flags=(OF,SF,ZF,AF,PF,CF)
115 mov regm, regm, reg
116 mov reg, reg, t2
117};

--- 46 unchanged lines hidden --- 		118 mov reg, reg, t1
119};
120
121def macroop XADD_R_R {
122 add t2, regm, reg, flags=(OF,SF,ZF,AF,PF,CF)
123 mov regm, regm, reg
124 mov reg, reg, t2
125};

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